IC Package Design Tool Tied To Field Solver

Nov. 10, 2003
By melding an existing IC package design and signal-integrity analysis tool with a 3D field solver, designers now have a means for early exploration, implementation, and validation of IC package designs. Cadence's Advanced Packaging Engineer (APE)...

By melding an existing IC package design and signal-integrity analysis tool with a 3D field solver, designers now have a means for early exploration, implementation, and validation of IC package designs. Cadence's Advanced Packaging Engineer (APE) has been coupled with Optimal's 3D field-solver engine to form APE-3D.

The new configuration enables IC buffer designers and pc-board system designers to explore, design, implement, and verify interconnect topologies and electrical constraints through simulation. It also lets them create full or partial IC-package simulation models to optimize interconnect performance throughout their systems.

A 3D field solver is critical to the accurate modeling of package interconnect elements, such as non-orthogonal traces, vias, wire bonds, and solder balls. It's also required to account for the non-ideal ground planes prevalent in high-end package designs.

The first APE-3D release contains an embedded Optimal PakSi-E 3D engine. It can extract signal interconnects for simulation or to characterize the entire package as a simulation model. This includes true 3D characterization of solder bumps, wire bonds, and solder balls as well as 3D modeling of complex ground and power planes. Models can be output as a Cadence SPECCTRA-Quest DML model, a Spice RLGC matrix, or an IBIS package model for use by IC or pc-board designers.

APE-3D will be available Q4 for Windows and Sun Solaris systems. Later releases will support HP, IBM, and Linux platforms. A one-year license starts at $63,000.

Cadence Design Systemswww.cadencepcb.com
About the Author

David Maliniak | MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.

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