Opinions gathered from an informal online survey of engineers' favorite EDA tools were, pun intended, all over the board. As one might imagine, the rank-and-file engineers who responded, some of whom are running small design shops, tended to name shrink-wrap-style pc-board (PCB) layout tools, freeware, and Spice among their favorites. There was, however, a surprising degree of support for emerging system-level design tools and methodologies.
Edwin Oxner, a senior engineer who's specialty is semiconductor design, cites PSpice among his favorites as well as LASI (a free downloadable modeling program developed at the University of Idaho, which can be found at http://members.aol.com/lasicad/). PSpice, says Oxner, is "the only Spice modeling program containing the critically important Curtice correction that is absolutely necessary for modeling JFETs, MOSFETs, and GaAsFETs operating at low voltages."
David Tecklenburg, a project engineer who designs external defibrillators, named Mathsoft's MathCAD and Spice as his favorites. "I like MathCAD because it does a very good job of documenting my design while I am doing my initial analysis," he says. "Spice gives me a more comprehensive look at all of my expected circuit parameters, including some insight into my manufacturing yields."
A number of survey respondents are fans of Altium's Protel PCB tools. Jason Smith, a designer of test and measurement equipment, finds that Protel "makes it easy to create new schematic symbols and PCB footprints."
John Handwork, a Xerox Corp. hardware engineer who designs color laser printers, sings the praises of Synplicity's Synplify for FPGA synthesis. Synplify gives him "quick compile times, good quality of results without tweaking, and the ability to tweak for better quality" if he needs it, he comments.
Benoit Clement, system-on-a-chip modeling and verification manager at STMicroelectronics, employs a SystemC-to-RTL design flow and names CoWare's SystemC modeling tools and Cadence's NC-SIM Verilog simulator as his go-to EDA software. He cites their system-level design and co-simulation (SystemC/RTL) features as key to his attachment.
Clement, as well as Paul-Louis Borianne, a software development engineer at STMicro, has praise for Tenison EDA's VTOC. The VTOC converter allows Borianne's software team to automatically generate a cycle-accurate simulator of a 32-bit CPU (about 50 kgates) synthesizable Verilog model. It's used for security applications. "This simulator is shipped as a part of our software-development tools. It allows our customers to perform early software development when an emulator or the chip itself is not yet available," says Borianne.
