DESIGN VIEW is the summary of the complete DESIGN SOLUTION contributed article, which begins on Page 2.
In today's quest for simplicity in "ready-to-use" EDA tools, understanding what's under the hood of a Spice circuit-simulation engine can be helpful, particularly for designs that challenge the conventional limits of Spice. Analog-centric designers will get the most out of Spice simulation by combining their knowledge and experience with an understanding of how their Spice design tool works.
Stepping back to Analog 101, Spice (Special Programs with Integrated Circuit Emphasis) is essentially an equation solver, in compliance with Kirchhoff's Current Law (KCL). The KCL matrix is modified by Spice to analyze the current through voltage sources, and with digital components (e.g., as with XSpice), it uses state variables in model extensions. For linear time-invariant circuits, the equation matrix creates a unique solution. Nonlinear circuits and operations involving integration require inserting a Norton equivalent circuit with the large-signal current summed into the matrix's right-hand side (RHS) and the small-signal conductance summed into the matrix.
That summation process is applied to the "matrix stamp" of a Spice model. Interestingly, during a Spice simulation, each model sums its contributions without knowing what the other models are doing.
The article discusses the Spice options for operating-point control to attain successful convergence and transient simulation control. Design tips are provided with various options to help make the process more efficient.
|Spice Options And Design Tips For Operating-Point Control||Key Spice options and considerations are given for those trying to achieve successful dc operating-point convergence. Operating-point convergence refers to the initial stable solution for all of the dc steady-state voltages.|
|Spice Options And Design Tips For Transient Simulation Control||Transient simulation refers to the large-signal analysis of a design, as would be performed using instruments like an oscilloscope, a signal generator, and a dc power supply on a breadboard design.|
|Behavioral Hysteresis Comparator||Figure 7 shows the comparator switching with default Spice options (a). It has a rise time equal to the Spice time step when passing the switching threshold (b). Performing the same simulation with VSECTOL=50n makes the vref signal switch from 0 to 5 V in less than 10 ns (c).|
|Initializing Complex Circuits||The preferred method for initializing these circuits, shown in Figure 8, is to use switches that apply initial conditions at time = 0, then remove the ICs when time > 0. Here, the technique is applied to a simple R-L-C circuit.|
Full article begins on Page 2
In today’s quest for simplicity in “ready-to-use” EDA tools, understanding what’s under the hood of a Spice circuit simulation engine can be helpful, particularly for designs that challenge the conventional limits of Spice. Analog-centric designers will get the most out of Spice simulation by combining their knowledge and experience with an understanding of how their Spice design tool works.
Stepping back to Analog EDA 101, Spice (Special Programs with Integrated Circuit Emphasis) is essentially an equation solver, in compliance with Kirchhoff’s Current Law (KCL). The KCL matrix is modified by Spice to analyze the current through voltage sources, and with digital components (e.g., as with XSpice), it uses state variables in model extensions. For linear time-invariant circuits, the equation matrix creates a unique solution. Nonlinear circuits and operations involving integration require inserting a Norton equivalent circuit with the large-signal current summed into the matrix’s right-hand side (RHS) and the small-signal conductance summed into the matrix.
Referring to Figure 1, the above summation process is applied to the “matrix stamp” of a Spice model. Interestingly, during a Spice simulation, each model sums its contributions without knowing what the other models are doing. When the diode anode is node K and its cathode is node L, the rows and columns of both K and L have the small-signal conductance summed into their matrix positions as shown. The large-signal current is summed with appropriate signs into the RHS.
Spice then iterates this solution to solve the nonlinear circuit equation. It’s worth mentioning that the simulator can’t distinguish linear and nonlinear circuits, so it will iterate linear circuit equations as well. Note that the basic KCL rule is: The sum of the currents at a node is constant. However, certain linear circuit equations may fail to converge if the RHS vector isn’t a constant. In this case, there’s no guarantee of convergence (state of complete matrix resolution).
Let’s critique a nonconvergence example. Note the transformer description in Figure 2 and its modified-nodal-admittance (MNA) matrix. Current is transformed from the input side (left) to the output side (right), while voltage is transformed in the opposite direction. These equations force the output power to equal the input power. The model also is useful for any power-conserving operation. In the third equation, the current at B4 is .5*IR1 (yellow). It must remain on the RHS because IR1 isn’t a matrix variable.
For this circuit configuration, v2 grows at each iteration, as shown in the Table. Clearly, the solution isn’t converging; v2 is alternating in sign and its magnitude is growing rapidly to infinity. However, if the model’s input and output were reversed, then the solution would have converged.
Next, consider an example of valid convergence (Fig. 3). The input current is sensed through a voltage source instead of a resistor. The current through the voltage source is a matrix variable. Here, a Spice3 arbitrary source by way of a B-element (Behavioral, Berkeley Spice) saves the variables and their derivatives. It then uses that information to move any RHS components using those variables back over to the matrix during the load operation as shown. With this minor change in the model, the circuit is made to converge without the need for any iterations. Importantly, one should consider B-element equations that only use matrix variables. One can still write equations with variable RHS values, but as was previously shown, it’s unwise to rely on the solution iterations to converge.
Back to Spice. To handle nonlinear algebraic equations, Spice simulators perform what’s known as a Newton-Raphson iteration. The linearized matrix of the diode shown in Figure 1, for example, is solved, plus a new operating point and its small-signal equivalent admittance are found. The process is repeated until reaching a stable solution. Figure 4a shows a test circuit using a diode, while Figure 4b shows how the equation is successfully iterated. Modeling a diode voltage as a function of current follows suit to real-world design, because that’s the typical procedure for estimating a diode’s operating point. Remember that a silicon diode’s forward drop ranges from 0.6 to 0.7 V for a large range of current.
Earlier on, the problem of finding a stable solution for this circuit used the equations formulated with current as a function of voltage (Fig. 5). You can see from inspection that the initial trial would place nearly 5 V across the diode, resulting in 8.348e+069 A. The next iteration would produce nearly the same result. Successively, it would take forever to walk the solution back to the correct answer. Luckily, Spice3 quickly recognizes this convergence problem and tries some interesting tricks to make even this ill-conditioned equation work.
The dc iteration limit (ITL1) defaults to 100 iterations. When it’s exceeded, the simulator employs a protocol called, “Gmin Stepping,” and if necessary tries another procedure called, “Source Stepping.” Gmin is a Spice option based on the smallest possible conductance. Spice3 begins by setting the number of steps to 10, then computes the diagonal offset as (Gmin *10numSteps). For the default, Gmin = 1e-12, and the initial offset is 0.01. That corresponds to a 100-W resistor to ground on the diagonal nodes. If convergence fails on the first step, then the simulator signals, “Gmin Step failed.” In such a case, one might increase the numGminSteps or increase Gmin.
Most Spice vendors have modified these algorithms to improve their performance. In Figure 3, we saw that a 100-Ω resistor across the diode initialized much closer to the correct solution in the example. The offset is gradually removed, and if on its final removal the circuit converges, the job is done. As previously mentioned, Spice3 otherwise engages its source-stepping matrix-resolving algorithm. With source stepping, all voltage and current sources are set to zero and stepped up to their final values using the number of steps as specified with ITL6.
For example, if you set ITL1 = 50 in Figure 5, then Gmin Stepping fails. Source stepping will in turn walk the solution up the I-V curve from V = 0 to create convergence. Depending on the vendor, Spice works pretty hard to make even poorly constructed models converge. Most modern Spice simulators employ variations of the described operating-point convergence methods and have fine-tuned the algorithms.
Design Tip: When building specialized models, you may need to keep the accounts option turned on (.OPTIONS acct) and keep an eye on the operating-point iterations.
The following are some key options and considerations in their use for successful dc operating-point convergence:
If used, there are some drawbacks. All of the instance current and power values must be removed because they can’t be initialized using UIC. The remaining script must be pasted into the User Statements window of the Simulation Setup dialog. For currents, you find the parts affected and fill in the IC=value. The preferred method for initializing complex circuits is to use switches that apply initial conditions at time = 0, then remove the ICs when time > 0. This is similar to what the old analog computers used to do. Figure 8 shows how this applies to a simple R-L-C circuit. The advantage of this technique is it sets the main reactive component ICs with pulse switches and lets Spice tend to everything else. The ICs were purposely set a little off to create something to analyze. The error between the initial and final value is just under 1 mµ. In comparison, if you use the previous script to find the ICs, the peak error is less than 7 mµ.