One 16-Bit Architecture To Bind Them All

Oct. 13, 2005
Processor architectures tend to follow one track or another. But that's not the case with Microchip's latest 16-bit product line. The company removed a few pieces from its 16-bit digital signal controller (DSC) and cranked out a general-purpose processor

Processor architectures tend to follow one track or another. But that's not the case with Microchip's latest 16-bit product line. The company removed a few pieces from its 16-bit digital signal controller (DSC) and cranked out a general-purpose processor.

The dsPIC 33 is the base implementation (Fig. 1). It includes extra features like a DSP engine and motor-control support not found in the line of general-purpose processors, the 16-MIPS PIC24F and 40-MIPS PIC24H.

Using the same architecture offers key benefits. First, the same toolset is used for all chips in the family. Next, the approach allows migration from a low-end microcontroller to a faster microcontroller to a digital signal controller.

All of the devices share a common core, which includes a 16-bit register file that works well with C/C++ compilers. In fact, the base development tool uses the GNU gcc compiler. The common core retains some handy features typically found in DSC and DSP architectures, such as a hardware multiplier, divide acceleration, and a barrel shifter. The barrel shifter provides more powerful instructions than the typical bit set/reset found in lower-end 8- and 16-bit microcontrollers.

The peripheral mix is similar to what other DSCs have, including I2C, SPI, CAN interfaces, and UARTs with LIN and IrDA support. The I2C interface brings hardware address recognition and supports master, multiple master, and slave interfaces. Also, there are 12-bit (10-bit on the PIC24F), 16-channel, 500-ksample/s analog-to-digital converters (ADCs), general-purpose I/O, and timers with pulse-width modulation support. An eight-channel DMA unit controls the peripherals.

Each chip can operate using the internal or an external oscillator. The former is sufficient for handling all asynchronous communication protocols supported by the hardware.

The dsPIC 33 can hold up to 30 kbytes of RAM, while the other processor lines top out at 16 kbytes. Flash-memory support tops out at 256 kbytes. The chips support self-programming. The debug interfaces include Microchip's ICD2, along with JTAG support.

PIC24F and PIC24H pricing starts at $4.55 and $5.16, respectively. Pricing for the dsPIC33 starts at $5.43. The chips come in 60-, 80-, and 100-pin TQFP packages. The Explorer 16 development board costs $129 (Fig. 2).

Microchip
www.microchip.com

About the Author

William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

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