ASIC Prototyping System Speeds Time To Results

June 2, 2008

2 min read

The HAPS-51T, a new addition to the HAPS (high-performance ASIC prototyping system) product family, leverages Xilinx's Virtex-5 LX330T devices to embody a suitable prototyping system for applications using high-speed serial interfaces like PCI Express, SATA, and Gigabit Ethernet. The HAPS-51T utilizes the LX330T device's 24 RocketIO GTP transceivers, adding on-board DDR2 memory and the new HapsTrak high-speed daughterboard connectivity scheme in a compact form factor.

The tight connection between the Virtex-5 LX330T FPGA and the on-board memory enables flexible, high-speed memory access to satisfy even demanding communication applications, according to Xilinx. The HAPS-51T's on-board memory includes:

1GByte of DDR2, expandable to 8 GByte
2 Mbit x 36 bit synchronous SRAM
32 Mbit x 16-bit Flash PROM

The HAPS system offers an easily expandable, modular architecture. As with all HAPS systems, the HAPS-51T utilizes the HapsTrak standard, a set of guidelines for pinout and mechanical characteristics to help ensure compatibility with previous and future generations of HAPS motherboards and daughterboards. In addition, the HAPS-51T introduces the new HapsTrak MGB multi-gigabit SERDES bus with up to 8 lanes.

Like all HAPS systems, the HAPS-51T is equipped with programmable clock generators, sophisticated monitoring and self-test features, and remote configuration and setup capabilities. Other integrated peripherals include a USB data port, SelectMAP, and JTAG.

Shipments of HAPS-51T for early adopters have already begun. Full production shipment of the HAPS-51T is currently expected to begin at the end of June 2008. Contact Synopsys directly for pricing and delivery details.

Synopsys
www.synplicity.com/products/haps/

About the Author

David Maliniak

MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.