Single-Card Bus Analyzers/Exercisers Speed Testing Of CompactPCI Designs Up To 66 MHz

Dec. 1, 1998

Designed for debugging and verification of next-generation CompactPCI board and system designs, the PBTC-415 PCI Bus Analyzer & Exerciser is a single-slot 3U card containing a complete logic analyzer and exerciser for the CompactPCI bus. The unit is able to capture and trigger on all bus activity in 32-bit as well as 64-bit CompactPCI bus backplanes at speeds of up to 66.7 MHz. The unit can also act as a 32-bit, 33.3-MHz PCI master or target, controlled fully through the user interface or with the built-in script capability.Finally, the module may be equipped with an optional piggyback module (PTIMBAT400-PB) with a 400-MHz Timing Analyzer and a PCI Anomaly Trigger unit for automatic detection of up to 68 PCI protocol or timing violations.

About the Author

Staff

Articles, galleries, and recent work by members of Electronic Design's editorial staff.

Sponsored Recommendations

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!