Cortex-M0 MCU Challenges 8- And 16-Bit Micros Across The Board

Feb. 3, 2010
NXP’s LPC1100 line based on ARM’s Cortex-M0 32-bit architecture targets applications normally left to 8- and 16-bit platforms.

LPC1111 Cortex M0 DIP prototype module

NXP’s LPC1100 line is based on ARM’s Cortex-M0 32-bit architecture, which offers five to 10 times the performance of 8- and 16-bit processors while delivering a 30% to 50% reduction in code size. It targets low-power applications. The LPC1111FHN33/101 has 8 kbytes of flash and 2 kbytes of RAM, and it comes in a 33-pin quad flat no-lead (QFN) package. Versions with up to 32 kbytes are available. Peripherals include a UART, I2C port, synchronous serial port (SSP), and eight-channel analog-to-digital converter (ADC). Pricing starts at $0.65. The chips are pin-compatible with the higher-performance 72-MHz LPC1300, which is based on the Cortex-M3 core. A line of USB-based, dual-inline package (DIP) prototype modules supporting the range of Cortex chips is available to developers (see the figure).

NXP

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William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

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