CPU, Multimedia, And Wireless ICs Take Center Stage At Hot Chips

July 19, 2004
Top companies will reveal their latest advances in portable systems, high-performance graphics, and advanced desktops at the 16th Hot Chips conference at Stanford University, August 23-24. Presentations will divulge new architectural...

Top companies will reveal their latest advances in portable systems, high-performance graphics, and advanced desktops at the 16th Hot Chips conference at Stanford University, August 23-24. Presentations will divulge new architectural approaches as they deliver leading-edge performance.

In addition to the regular papers, keynote speaker Robert Denise of NASA's Jet Propulsion Lab will provide an inside look at the Mars Rover. Fellow keynoter Steve Jurvetson of Draper, Fisher, Jurvetson will examine "Nanotechnology and the Future of Moore's Law."

Though it's last in the lineup, Session 10 will provide a look at three high-performance CPUs: the Montecito processor and a 90-nm implementation Pentium 4, both from Intel, and Sun Microsystems' 32-way multithreaded SPARC processor.

Session 6 will highlight specialized high-performance CPUs, too. Riken will display its 165-GFLOPS application-specific chip, which tackles molecular dynamics simulations. The session also will feature a CPU from Sun that accelerates next-generation public-key cryptography. A signal-processing engine developed by SolarFlare that lets the company implement a serializer/deserializer that delivers 10 Gbits/s over unshielded twisted-pair wiring will share the spotlight as well.

Sessions 1 and 2 will focus on specialized multimedia and audio/video/graphics processors. In Session 1, Intel will show off its PXA27X processor, which targets phone and PDA applications. Nvidia will reveal details of its SC10 video processor for handheld applications. And, Hitachi will discuss its SH-Mobile3 application processor for 3G cellular systems. In Session 2, Creative Labs will display Quartet, a pipeline-interleaved multithreaded audio DSP. Amphion Semiconductor will detail an H.264/AVC video decoder core for multimedia system-on-a-chip designs as well.

Session 4 will continue this topic with looks at Nvidia's latest high-end graphics engine, ARM's new media processor architecture, and Intel's MXP5800 media processor. Sony will close out the media-engine review in Session 8 with a single chip that combines embedded DRAM, a 3D graphics engine, an H.264 codec, and a reconfigurable processor. Meanwhile, another Session 8 paper will describe an AMD low-power Opteron processor for portable systems.

Wireless communications will be the focus of Session 3. Toshiba will show an IEEE802.11a wireless audio/video module, while Sirfic Wireless will present a CMOS direct-conversion transceiver for wireless wide-area-network and wireless local-area-network systems.

For embedded wireless communications, check out Session 7 as U.C. Berkeley examines research in low-power wireless sensor networks. In other processor developments, Infineon will present a high-speed microcontroller for power-train systems in automotive applications.

Presentations by Tensilica and ARM in Session 9 will examine the custom-crafting of processors and provide an overview of the ARM OptimoDE multiprocessor architecture. Additional processors will be described in Session 5. AMD will detail a platform and processor simulator, and PCM-Sierra will show off a new system-on-a-chip bus architecture optimized for 1-GHz CPUs. And, Cooligy will discuss its microchannel-based liquid cooling technology (see "MEMS-Based Heat Exchanger Cools 'Hot' CPUs," electronic design, Sept. 29, 2003, p. 43).

For program details and registration information, go to www.hotchips.org. Immediately following Hot Chips will be the Hot Interconnects conference, which details high-performance networks and system interconnects. Go to www.hoti.org for the program.

About the Author

Dave Bursky | Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.

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