ASSPs Provide Migration Path To IP Cores

Nov. 1, 2000
The RocketPHYer family of multi-gigabit, physical layer transceiver application specific standard products (ASSPs) for high-performance serial communications applications are fabricated using CMOS foundries. Designed to provide a seamless migration

The RocketPHYer family of multi-gigabit, physical layer transceiver application specific standard products (ASSPs) for high-performance serial communications applications are fabricated using CMOS foundries. Designed to provide a seamless migration path to the company's integrateable IP solutions, the ASSPs feature serial data channel rates of 1.25 to 3.125 Gb/s and higher. They can be used for applications such as Gigabit Ethernet, Fibre Channel, Serial Backplane, InfiniBand, and the emerging 10-Gb/s Ethernet, IEEE 802.3ae standard. The RC5210 is the first of these physical layer transceivers (PHYs). It is a 2.5 Gb/s, single-port serializer/deserializer device, fabricated in a 0.25-mm CMOS logic process. It is designed for ultra high-speed, bi-directional point-to-point or serial backplane applications and integrates transmitter, receiver, clock synthesis, and clock-data recovery circuits on a monolithic chip. The on-chip PLLs function with channel data rates of 1.0625, 1.25, 2.125, and 2.5 Gb/s. Operating on a single 2.5-V supply, operating power is 250 mW typical at 1.25 Gb/s, or 350 mW at 2.5 Gb/s. The RC5210 is offered in a 100-lead QFP with volume production scheduled for the second quarter of 2001.

Company: ROCKETCHIPS INC.

Product URL: Click here for more information

About the Author

Staff

Articles, galleries, and recent work by members of Electronic Design's editorial staff.

Sponsored Recommendations

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!