Reduce Design Time For DSP, Wireless Links

Sept. 1, 1998
With additional modeling, analysis, and debugging features that let designers more easily simulate and test complete wireless communications applications at the system level, SystemView v2.1 for system design and simulation enables verification that

With additional modeling, analysis, and debugging features that let designers more easily simulate and test complete wireless communications applications at the system level, SystemView v2.1 for system design and simulation enables verification that the subsystems such as the front-end, ADC, and DSP functions will interact together correctly to reduce time-to-market by detecting errors early in the design cycle. Analysis and debugging capabilities include a 3-channel dynamic system probe. The 3-channel probe (A, B and Z axis) of SystemView greatly simplifies debugging. A designer can trace a signal through an entire system simply by moving the probe to the output of each block during system execution to quickly pinpoint the source of the problem in real time. In addition to time waveforms, the probe can display data as constellations, eye patterns, and in the frequency domain.

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