Source-Down-Packaged MOSFET Fulfills Data Center Power Needs

A new 25-V power MOSFET from Alpha and Omega Semiconductor (AOS) meets the rising power demands of AI servers and data center power-distribution systems. AOS said the AONK40202 is intended for high power density in DC-DC applications. It leverages advanced “source-down” packaging technology to sharply reduce power losses and enhance heat dissipation compared to traditional “drain-down” packaging.

The source-down configuration is becoming one of the industry standards for power device packaging. In source-down, the silicon chip is flipped upside down inside the package, positioning the active side of the power device closer to the PCB. The approach enables the placement of a larger silicon chip in the same package area. The larger die reduces the on-resistance (R_DS(ON)) of the FET, leading to higher efficiency and power density at the system level than drain‑down packaging.

AOS said the dual flat no-lead (DFN) 3.3- × 3.3-mm source-down packaging enables a larger source contact to the PCB, which means it can remove heat more efficiently than traditional DFN 3.3- × 3.3-mm drain-down packaging solutions. Heat is dissipated directly into the PCB through a thermal pad on the package.

Peter H. Wilson, senior director of MOSFET products at AOS, said the AONK40202 is specifically designed to meet the mounting power demands of AI, which have been straining traditional power electronics in data centers.

The latest generation of graphics processing units (GPUs), such as NVIDIA’s Blackwell B100 and B200, burn up to 1200 W each to run training, inference, and other computationally heavy AI workloads. AMD’s latest AI GPU, the MI355X, is even more power-hungry. While it claims to compete with NVIDIA’s Blackwell family of chips, the MI355X peaks at 1400 W, which is around 80% higher than the 750 W used by its predecessor, the MI300X. And it’s 40% more than the 1,000 W power envelope of its air-cooled counterpart, the MI350X.

The trend is pushing data center power infrastructure to its limits, with rack-level power densities rising from the 10 to 40 kW range to more than 100 kW per rack in a short span. The power needs of AI are projected to push power-per-rack specifications to more than 500 kW before 2030.

As a result, power electronics—notably, the power-supply units (PSUs) residing in the rack—are evolving to ensure more power makes it to the GPUs and other high-performance AI chips. Liquid cooling is also becoming more prevalent.

Built for Power-Hungry AI Servers

Designed for high-density DC-DC conversion and synchronous rectification, AOS said the new power MOSFET uses 3.3- × 3.3-mm DFN source-down packaging technology to handle the huge amounts of current used by today’s and future AI servers. The power device, which integrates a clip on the drain side of the silicon chip, can manage more than 300 A of continuous current at 25°C and more than 220 A at 100°C, with a maximum junction temperature rating of 175°C.

The company said it comes with a maximum R_DS(on) of 0.7 mΩ at 10 V, which reduces conduction losses. The conduction losses caused by the MOSFETs in a power block can have an outsized impact on system performance and efficiency. This is particularly evident in data center power supplies, where conduction losses contribute to a large portion of total power loss, driving the need for MOSFETs with minimal R_DS(on).

Another feature of the AONK40202 is that it has a center gate pin configuration. This enables easier routing on the PCB and helps keep the distance between the gate driver and the power transistor as short as possible.

The AONK40202 is now shipping in production volumes, with pricing starting at $1.65 in 1,000-unit quantities.