April 5, 2012. Tektronix Inc. has announced the next generation of DDR3 probing solutions for logic debug and protocol validation using the Tektronix TLA7000 Series logic analyzers with support for DDR3-2133 MT/s and DDR3-2400 MT/s.
With the introduction of the new high-speed DDR3 interposer for the DIMM form factor, Tektronix enables customers to reuse their existing TLA7BBx modules to acquire Address, Control, Command and Data signals for all DDR3 speeds—ranging from DDR3-800 MT/s to DDR3-2400 MT/s as well as Low Voltage DDR3. The new interposer is the first to use Tektronix ultra-high performance SiGe hybrid ASIC technology to provide true analog insight at every DDR3 I/O. The new Interposer is designed to maintain signal integrity on the target by providing reduced probe loading when compared to other commercially available interposer solutions.
Across all computing segments, there is strong demand for faster and higher memory capacities together with lower power consumption. JEDEC continues to add higher speed grades to the DDR3 standard and is moving toward a new DDR4 specification. With its new interposer architecture, Tektronix is not only supporting today’s higher speed DDR3 requirements but also setting the stage for rapid support of DDR4 as that standard moves forward into the market.
“The industry is pushing the performance envelope on DDR3 memory to keep pace with ever more demanding applications,” said Dave Farrell, director of the Digital Analysis Product Line for Tektronix. “Our DDR3 solutions provide design engineers with the most complete, high performance tools for logic debug and protocol validation of the DDR3 interface at an industry leading price point. We are well positioned to support high speed DDR3 and also the emerging DDR4 standard.”
Complete Protocol and Analysis Solution
Protocol analysis and debug for the newer higher speed grades of DDR3 represents a major challenge for silicon manufacturers, OEMs, and systems manufacturers alike who are seeking ways to reduce time to market. The new interposers together with a comprehensive suite of tools from Tektronix partner Nexus Technology speed time to market by providing easy setup and analysis of all DDR3 traffic.
These tools include a sample point analysis tool that automatically determines and sets appropriate thresholds and sample point values, new ICIs tool that shows the DDR3 signals in an eye diagram to quickly evaluate bus health or to select the sample point/threshold on marginal systems or systems operating at non-standard speeds, a DDR3 memory support package that decodes the DDR3 bus traffic to display mode register information and DDR3 commands as well as read and write data, and new protocol violation software that offers measurement of 43 different JEDEC compliance parameters of the DDR bus across multiple acquisitions and provides various statistical analysis of the DDR bus traffic.
The TLA7BBx logic analyzer module features simultaneous 3.0-Gbps state acquisition, 20-ps high-speed timing visibility, and 3-GHz BW analog measurement capability—all though the same probe. Using the built in analog mux, users have the ability to step through and view all of the DDR3 signals on an oscilloscope in less than ten minutes, gaining insight into the signal integrity of memory signals that might otherwise take hours or days. Engineers can also view analog oscilloscope waveforms time correlated with state data acquired on the logic analyzer.
See earlier news: ADLINK Launches New Quad-port PoE Frame Grabber