Keysight Technologies has introduced a new ball grid array (BGA) interposer for testing DDR4 x16 DRAM designs with a logic analyzer. The interposer provides fast, accurate capture of address, command, and data signals for debugging designs and making validation measurements. The Keysight W4631A BGA interposer is used with Keysight’s E5849A probes for high-data-rate DDR4 DRAM designs.
As the industry transitions to DDR4 data rates up to 3.2 Gb/s, engineers working on next-generation memory systems—such as those used in servers and embedded devices—face significant challenges. Probing and accurate signal capture are becoming increasingly critical for debug and validation of new designs.
The W4631A interposer solves probing connectivity by providing access to DDR4 x16 DRAM signals critical to debug and validation efforts. The probe works in many existing designs and eliminates the need for up-front planning or redesign. The probe connects directly to the balls of the DRAM with a DDR4 96 ball riser (included) or an optional third-party socket (not provided), enabling operation and acquisition of high-speed DDR4 signals with low loading and minimal impact to signal integrity on embedded system design. The interposer is designed to be used with the U4154B logic analyzer system.
The Keysight W4631A BGA interposer is designed for data rates up to 3.2 Gb/s. The probes are used with the U4154B logic analyzer to perform functional tests.
“Our customers need more accurate tools to achieve 3.2 Gb/s data rates and implement power-saving functionality,” said David Cipriani, vice president and general manager of Keysight’s Oscilloscope and Protocol Division. “With the new interposer, probes and logic analyzer system, engineers are ready to test DDR4 x16 data rates beyond today’s data rates of 2400 Mb/s.”
The Keysight DDR x16 test solutions include these features:
- The B4622B DDR2/3/4 and LPDDR/2/3 protocol compliance and analysis toolset, providing four different software tools: two for functional protocol compliance checks, one automated physical address trigger setup tool, and one tool that provides an overview of system performance through bus statistic information and a histogram view of address access. These tools help reduce memory designers’ troubleshooting time and increase productivity and efficiency in DDR design validation work.
- The B4621B DDR2/3/4 protocol decoder software, for translating acquired signals into easily-understood bus transactions showing associated data bursts. Valid read and write commands are decoded to include row and column addresses and the complete data burst associated with the command. The B4621B bus decode software anticipates key system attribute inputs from default DDR2, DDR3 or DDR4 probing configurations or the DDR setup assistant tool to accelerate decode of DDR2, DDR3, or DDR4 bus signals.
- The DDR eye scan/eye finder, providing unique eye-scan capability to automatically place the sampling point in both time and voltage within the eye on each individual channel for optimal sampling reliability. The DDR eye-scan display provides bus-level signal integrity insight for a qualitative comparison of all signals scanned under the same conditions.
- The DDR setup assistant tool, for guiding users through a short series of questions and pull-down menus to assist in tuning state mode measurements on DDR2/3/4/ or LPDDR2/3/4 measurements.
- The DDR configurator creator tool, a new tool added to the Keysight DDR setup assistant and eye-finder software package. The tool allows engineers to define the footprint’s layout according to a custom probing solution used in the DDR/LPDDR setup and then create an XML configuration file based on the footprint information.
- The U4154B logic analysis module with 4-Gb/s state speed and 2.5-GHz trigger sequence speed, which enables full capability so engineers can reliably trigger and capture DDR4 signals at 3.2 Gb/s. When used with the new DDR4 x16 probing solution, the B4621B decoder and B4622B compliance software toolset, this module provides full test capability for system integration in the memory industry.
- The Keysight E5849A high-data-rate ZIF cables, available for use with the W4631A interposer solution.
The Keysight DDR4 x16 DRAM probing capability can be ordered now, with prices starting at $10,316.
The complete U4154B logic analyzer system for probing DDR4 x16 DRAM start at $97,673.
Additional information about Keysight’s W4631A BGA interposer is available at www.keysight.com/find/W4631A. Additional information about Keysight’s U4154B logic analyzer family is available at www.keysight.com/find/U4154B. Additional information about Keysight’s high-speed digital technologies is available at www.keysight.com/find/hsd. Additional information about Keysight’s family of logic analyzers is available at www.keysight.com/find/LogicAnalyzer.
