Keysight expands AXIe signal-processing capability

Oct. 14, 2015

Santa Rosa, CA. Keysight Technologies today introduced an enhanced signal-processing configuration for its M9703B 12-bit AXIe high-speed digitizer/wideband digital receiver. System architects and engineers can use this new bundle option, which is suitable for OEM and aerospace and defense applications, as a component of a larger system requiring extensive FPGA capabilities and a high number of customizable real-time I/O interfaces.

The M9703B-B01 bundle comes pre-configured with the following available options:

  • 1-GS/s sampling rate (-SR1),
  • input frequency of DC to 650 MHz (-F05),
  • large FPGA (-SX3),
  • large acquisition memory (-M16),
  • triggered simultaneous acquisition and readout (-TSR),
  • custom firmware capability (-FDK), and
  • new IO-EXT interposer mezzanine providing a total of 192 input/output (I/Os).

The U5340A FPGA development kit, a standalone software package, allows system architects and engineers to implement their own complex algorithm on board the M9703B high-speed digitizer as well as to address the I/O to monitor and control their OEM system.

“Thanks to an unprecedented combination of 192 digital I/Os, eight high-speed, 12-bit analog input channels, and a scalable open FPGA architecture, the new M9703B-B01 product provides the most versatile and customizable AXIe digitizer platform solution in a compact 1U form factor,” said Pierre-François Maistre, Keysight Communication Measurement Solutions R&D project manager. “By providing wideband solutions that support advanced signal capture, Keysight aims to address more complex challenges in a large variety of aerospace & defense applications that require the treatment of a high amount of data and the control of very large systems.”

The new B01 bundle option is available now for the M9703B AXIe 12-bit high-speed digitizer/wideband digital receiver.

www.keysight.com/find/M9703B

About the Author

Rick Nelson | Contributing Editor

Rick is currently Contributing Technical Editor. He was Executive Editor for EE in 2011-2018. Previously he served on several publications, including EDN and Vision Systems Design, and has received awards for signed editorials from the American Society of Business Publication Editors. He began as a design engineer at General Electric and Litton Industries and earned a BSEE degree from Penn State.

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