Anritsu addresses emerging technologies at DesignCon 2017

Jan. 30, 2017

Richardson, TX. Anritsu will present testing solutions and technical sessions to aid engineers more efficiently develop next-generation chips, boards, and systems used in emerging applications, including IoT/M2M and 5G, at DesignCon, beginning January 31 in Santa Clara, CA. Signal-integrity solutions featuring the MP1800A BERT Signal Quality Analyzer (SQA) as well as the VectorStar and ShockLine vector network analyzers (VNAs) will be on display in the Anritsu booth throughout the show.

Among the demonstrations will be a 56G/112 NRZ and PAM4 accurate jitter-tolerance test system featuring the MP1800A with the G0374A 64 Gbaud PAM4 DAC and MP1825B 4-tap emphasis that satisfies the high accuracy and margin requirements of relevant communications standards. For high-speed serial-bus verification, the MP1800A will be integrated with the MP1825B and MG3710A vector signal generator to conduct jitter tolerance tests on PCIe and 100GE interfaces.

The MP1800A will also be configured with the MS46524B ShockLine economy vector network analyzer, along with Granite River Labs calibration and receiver test software to create an automated, simple, and efficient method to test Thunderbolt 3 Receiver CTS. To support the latest USB3.1 Gen2 SuperSpeed+, 10 Gb/s receiver test standards, Anritsu will show the MP1800A with its new G0373A USB 3.1 receiver test adapter and dedicated high-speed serial data test software.

Also in the Anritsu booth will be the VectorStar VNA series in multiple configurations. One station will include a 70 GHz 4-port signal-integrity solution and another will be a 4-port 70-kHz to 10-GHz broadband VNA solution for on-wafer device characterization.

Technical sessions

During DesignCon 2017 Anritsu will host technical sessions featuring industry experts. The presentations will help engineers have greater confidence in their designs, as well as improve their test processes for faster time-to-market and lower cost-of-test. Topics include de-embedding sensitivities, symmetry and differential pair coupling; 100G AOC/Q-SFP test; signal-integrity VNA applications; high-speed serial-bus receiver test; and 56G PAM4 bit error rate test.

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