Eindhoven, the Netherlands. JTAG Technologies announced that it will return to SMTA International this year to premiere several new hardware products for PCB testing and in-system device programming. The company will also showcase its new collaborative product with Altium—JTAG Maps—plus various functional tester products. The event will be held September 19-20 in Rosemont, IL.
The production-oriented solutions on display will include JTAG’s extensive Symphony range of third-party tester integration products. Use of the Symphony options allows the latest professional JTAG/boundary-scan capabilities to be added to existing ATE from Teradyne, Keysight, SPEA, Seica, NI, and others.
The latest product on display will be an example of JTAG’s “fixture embedded” test technology—the JT 5705/FXT multi-function JTAG tester built into one the small linear series of cassette-based re-configurable fixtures of Everett Charles Technologies (ECT). The JT 5705/FXT is a compact, single-board test system that supports analog measurement and stimulus, frequency measurements, digital I/O, boundary-scan testing, and in-system device programming. Within the fixture multiple JT 5705/FXT tester cards can be mounted on purpose-built carriers featuring the ATE industry standard Pylon connectors.
The company will also show its JTAG-powered PCB tester-programmer, the JT 57xx/RMI Combi-System—a modular concept of a newly designed base-level 19” U rack-mount chassis assembly that can house up to four customer-specified modules offering various JTAG (IEEE 1149.x) controllers, digital I/O, analog I/O, and other measurement features. The modules are either half-rack or quarter-rack width and are available in different configurations. JTAG will present the full module range at the show.
Finally, the company said a large number of today’s electronic designs feature JTAG/boundary-scan components that provide valuable test resources during hardware debug, manufacturing test and even depot repair. JTAG Maps is a simple extension to the Altium Designer tool suite that allows the user/engineer to thoroughly assess the capabilities of the JTAG/boundary-scan resources on their design—before committing to layout. Until now engineers could often spend hours highlighting the boundary-scan nets of a design manually to assess the fault coverage that boundary-scan testing could bring a specific design. Today the free JTAG Maps for Altium application extension does this and more, freeing up valuable time, allowing a more thorough DFT and speeding time to market.