System-level test contends with billions of untested transistors

Why might you need semiconductor system-level test (SLT)? As Karthik Ranganathan, director for semiconductor solutions at Astronics Test Systems, points out, if you test a 22-nm, 2.5-billion-transistor SoC with 99.5% static ATPG test coverage, you’re leaving 375 million transistors untested. And static ATPG alone will be insufficient—you’ll need at-speed test as well. But if you test a 5-nm, 40-billion-transistor SoC with 85% at-speed test coverage, you’ll be leaving 6 billion transistors untested.

So what, exactly, is SLT, and how can it help? According to Anil Bhalla, senior marketing manager at Astronics Test Systems, semiconductor SLT consists of application-specific functional tests performed on an IC DUT placed in a socket while system-level tests are applied. “System” in this context can consist of the DUT, socket, application board, and power supply as well as software, including firmware, drivers, operating systems, and applications. The combination of structural, functional, and system-level test, he says, leads to 100% test coverage.

Ranganathan adds that SLT can also help recover good devices that might have failed due to excessive guard bands applied during functional ATE tests. It can also address dynamic voltage-frequency scaling (DVFS) and process voltage-temperature (PVT) corners.

Bhalla and Ranganathan will address these issues and more Wednesday November 29 from 1:00 to 2:00 p.m. EST in a Webinar titled “Key Trends Driving the Need for More Semiconductor System-Level Test,” at which I will serve as moderator. Bring your questions about SLT, and Bhalla and Ranganathan will answer them at the end of their presentation. Click here to register. If you can’t attend the live event, you can register anyway and receive an email letting you know when the archived version is available.

Meanwhile, you can read more about SLT at the article “ITC virtual panel let audience weigh in on system-level test.”