Capable of supporting four independent JTAG ports with programmable voltage levels, PCI-1149 controller is designed to support the widely used IEEE 1149.1 (JTAG) boundary-scan test standard. Scan test vectors can be applied to up to four scan chains using four JTAG ports. An additional 16 digital I/O lines with software programmable voltage levels are provided to connect to non-scanable nodes on the unit-under-test. The JTAG ports are programmable from 2V to 3.4V in increments of 0.05V. The controller is well-suited for applications such as CPLDs in-system programming, functional device testing of ASICs using the INTEST scan capability, and functional testing of non-scanable cluster logic.
Company: CORELIS INC.
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