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Electronic Design

Architecture Counts In Verification</A><BR><FONT CLASS=body11>Sponsored by: <A HREF="" TARGET=_blank CLASS=body11>VERISITY CORP.</A></FONT><A>

A quick take on automating the verification process

One Environment Fits All

The universe of verification encompasses a number of modalities, including software simulation, accelerated simulation, and emulation. Historically, users of these various modes of verification were forced to use separate environments for each. Those users of verification environments with true system-level requirements tend toward emulation. But in today's market, there are verification technologies that support all three modes, allowing engineers to transport models from simulation all the way through to emulation. This results in preservation of the modeling and testbench efforts as well as a consistent basis for comparison of results in each modality.

Who Uses Emulation?

Designers of chips with typically 1 million gates or more are going to require hardware-assisted verification technology in various forms. They'll need simulation acceleration to simulate very long cycles or run full regression suites. The next step for such users is emulation, whether in-circuit or targetless. The latter is often used for firmware development of boot code and device drivers or to prove diagnostics. Then, they'll often move to in-circuit emulation for booting operating systems and running application software. Here, the in-circuit mode is used so external stimulus can be connected to the system. Some verification vendors also offer microprocessor-based target boards that allow the system processor to be located outside of the emulator, enabling the operating system and application code to be run at very high speeds.

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