ASIC/SoC Development Platform Performs Emulation And Much More

June 10, 2002

A three-in-one EDA product featuring emulation, coverification, and simulation acceleration on a universal platform, the Comulator N2.1 may be used with all hardware description language (HDL) simulators and all design languages and on all hardware platforms. The system is designed for network operation, supporting team-based verification and resource sharing. Processor emulation performance is 100 kcps to 100 Mcps. Coverification is performed at speeds 1000 times faster than C models. Each Comulator N2.1 station includes one EMA reconfigurable prototyping board, one hardware accelerator, and design verification application and interface software. Comulator hardware and software may reside within the user's HDL software simulation server or on any Unix, Linux, or Windows-based Comulator station. Prices start at $60,000.

Alatek Inc.
www. alatek.com; (702) 892-3720

About the Author

David Maliniak

MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.