With signal speeds on the rise in a wide range of applications, maintaining signal integrity (SI) and minimizing the effects of EMI have become growing challenges in countless board-level designs. Clock rates of several hundred megahertz have become commonplace, and in some applications, logic devices are breaking the 1-GHz barrier. Naturally, as on-chip signal speeds get faster, bus speeds escalate as well.
Consider also that component and I/O densities on the pc board are rising, too. The combination of faster signals and tighter line spacings means high-speed effects are becoming more serious. Nowhere are these effects more critical than at the connector. Board-level interconnects for high-speed systems require consideration of such factors as crosstalk, ground bounce, propagation delay, skew, impedance, return loss, and attenuation.
The relative importance of each of these parameters depends greatly on the application. Furthermore, these electrical characteristics tend to vary nonlinearly as frequency increases. SI issues, which are present to some degree for signals even as slow as a few megahertz, become especially troublesome as frequencies creep into the gigahertz range. More significant than the actual clock speed is the edge rate of the signal. If the round-trip transit time for a signal over a given path is greater than the signal's edge rate, then that path must be treated as a transmission line, and the designer must consider SI effects.
As a result, even designs with relatively slow clock speeds may suffer unwanted high-speed effects. The problem might occur when a logic device found in an existing design is replaced—perhaps because of obsolescence or the need for a smaller package—with a newer version that has a higher edge rate. Nevertheless, the focus on developing high-speed connectors reflects the steady ramping up of clock speeds. As John Hynes, a new-products development manager at Samtec in New Albany, Ind., observes, "The push is to get to 1 GHz cleanly."
Of course, the definition of "clean" performance is anything but. It varies from design to design and depends largely on how the connector is applied in the application. The choice of differential over single-ended signaling becomes a must at higher frequencies. The ground structure—both the ratio of signal to ground pins and their configuration—markedly affects results, particularly for connectors without a built-in ground plane. Board design also is critical. Layer-to-layer stackup, goldfingers, and vias all have an effect on connector performance. Recognizing this fact, connector vendors are providing customers with reference layouts as well as design guidelines for their components.
Getting board-level connectors to operate at a gigahertz or more isn't just about building high-speed connectors. It's about achieving the necessary performance versus cost. Connectors such as the BNC and SMA types designed for microwave work can more than satisfy many of the electrical performance requirements of high-speed systems. But their pricing is orders of magnitude above that of traditional digital pc-board interconnect components. And, they don't offer the required high density of signal contacts.
Existing board-level interconnect products are steadily improving, as evidenced by some of the recently introduced backplane and board-stacking devices described below. Simple techniques, like surface-mount board attachment or the insertion of a ground plane between rows, help.
In the future, development of materials with improved dielectric constants, novel shielding configurations, and different types of metals will likely improve high-frequency performance. As the skin effect becomes the main path for conduction at higher-frequencies, contact-pin plating will matter for its effect on resistance as well as for its ability to fight corrosion.
Unfortunately, semiconductor development seems to be outstripping connector development. While Intel may be introducing chips that run at 1.5 GHz and chip designers craft even faster ICs in the laboratory, most interconnects aren't close to handling these types of signals. Max Peel, president of Contech Research—a company that specializes in connector testing in Attleboro, Mass.—has observed this discrepancy first hand. When performing a full SI characterization on a board-level connector, the company runs its tests just up to a frequency of 1 GHz because, as Peel says, "the connectors generally cannot go beyond that."
Because of the relationship between a signal's edge rate and transit time, one aspect of high-speed connector development is minimizing the length of the signal path through the connector. Doing so can reduce the effects of connector parasitics while keeping the signal within the controlled-impedance environment of the board longer.
However, reducing the length of signal-contact paths isn't the greatest challenge for connector developers. Michael Munroe, a strategic product marketing manager at ERNI Components Inc., based in Chester, Va., notes that pc boards and connectors are both capable of carrying faster signals than they are currently required to handle. According to Munroe, "The most challenging bottleneck is the interface between the connector and the board. Every solution must be a compromise between density, performance, and routeability. The typical close grid of 0.5- to 0.8-mm vias used to support through-hole high-density connectors will become the future technology focus."
The board-to-connector interface is where problems such as capacitive coupling between pins become difficult. With through-hole types of connectors, that capacitance varies directly with the diameter of the drilled and plated mounting holes and the spacing between them. It's possible to lower interpin capacitance by moving the holes farther apart, but that lowers I/O density—and that may not be acceptable.
Another possible solution is backdrilling, which removes metallization from the vias where it's not needed. For example, if a signal pin in a 12-layer board connects to a signal line on layer 6, then the corresponding via may be drilled from top and bottom to remove the plating above and below this layer.
Surface-mount attachment offers a third way to reduce the capacitance between pins by eliminating the need for plated through holes. Connection to the various signal layers of the board can then be made using microvias, which reduce capacitance by virtue of their smaller surface areas and the designer's ability to space them farther apart.
The surface-mount approach has been adopted by several of the new high-speed connector designs, including the MicroGiga connector from Fujitsu Takamisawa, Sunnyvale, Calif. Designed for high-speed differential signaling, this device (part number FCN-260D) is an impedance-controlled, 0.75-mm pitch, two-row board-stacking connector. Operation is specified for signals up to a frequency of 2.5 GHz.
Although its materials are fairly normal—the housing is a high-temperature liquid-crystal polymer and contacts are copper based—the MicroGiga's structure is rather different from the usual structure. Typically, a ground plane runs down the center of the microstrip-style connector. This provides good isolation between pins within a given signal pair, but it doesn't isolate adjacent pairs.
The MicroGiga, though, intersperses ground and power contacts between signal pairs. This improves their isolation by creating a coaxial-like structure (Fig. 1). When tested at a rise time of 50 ps, crosstalk measurements were 3% (near end) and 5% (far end). The connector is now available in 12- and 24-differential-pair versions in 8-mm stack heights. Additionally, the company plans to introduce a shielded cable and connector version of this device in the second quarter of this year.
Some companies are converting existing connector designs to surface-mount versions to reach higher speeds. One example is the Metral HB, a 2-mm connector for backplane and cable applications from FCI Electronics, Valley Green, Pa. In its original press-fit version, the device was specified for differential-pair signaling at speeds up to 3.2 Gbits/s. Changing to a BGA-style header in the new model increased this rating to 5 Gbits/s
Another vendor, Thomas & Betts of Memphis, Tenn., created an interesting variation on the surface-mount approach. It developed a form of backplane interconnect that achieves signal speeds of 3 Gbits/s with negligible crosstalk. In the MPI-SI interconnect system, traces on the daughter card are routed to the edge of the card with lines ending on the card's narrow side. An array of metallized-particle interconnect (MPI) columns mates the traces on the daughtercard with surface-mount pads on the backplane. (Fig. 2). Special compression hardware maintains the required contact force while holding the daughter card at a right angle to the backplane.
The columns are the key to this interconnect system. Formed of a flexible and conductive polymer with embedded metallized particles, the columns measure approximately 0.66 mm in diameter and 0.89 mm high. A thin Kapton substrate holds the columns in a 1-mm interstitial pattern. Under compression, column height is reduced to just 0.71 mm. This makes for a short path through the connector while allowing signals to stay longer in the controlled impedance of the board.
Though it doesn't get soldered to the board, the board layout is critical to performance, just as it would be with a conventional backplane connector. Pads and vias have a greater impact on the signal than the columns themselves. In measurements taken on the MPI-SI interconnect, the connector's impedance was 45.2 Ω at a signal rise time of 200 ps. Depending on its length, a comparable right-angle connector could have an impedance of 100 Ω. The company expects pricing to be around $0.10 per contact, which would be considerably less than stripline connectors capable of similar performance.
Connector developers are under pressure not only to solve SI problems at high signal speeds, but also to produce finer-pitch components. Samtec, which currently has high-speed matched-impedance socket and terminal connectors available at pitches as low as 0.5 mm, plans to introduce 0.4-mm pitch models shortly. The design is the familiar two rows of pins with an integral ground plane running between them.
Based on results obtained with the 0.5-mm components, the company has made some projections about the performance of the new components for operation in a 50-Ω system and with pins assigned in a signal-ground-signal configuration. At a frequency of 500 MHz, approximate specifications should be an impedance of 52.5 Ω, an attenuation of −0.15 dB, a propagation delay of 73 ps, and crosstalk of −20 dB. Samples of these connectors are due out this month, with production quantities slated for the summer.
Board-to-cable interconnect is another area in which higher-speed components are emerging. According to Dick Wilkinson, principal applications engineer at Joy Signal Technology Inc. in Chico, Calif., high-speed cable assemblies fall into three categories when grouped by frequency—those for system clocks up to 50 MHz, 50 to 300 MHz, and 300 MHz and above.
The first category includes standard PVC ribbon cables with IDC connectors and conductors on 0.100-in. spacings. Assemblies in the middle group are similar except for the choice of dielectric material, which is Teflon rather than PVC. Grounds are inserted between signal lines, and conductors are spaced at 0.100, 0.079 (2.0 mm), or even 0.050 in. Cables used in low-voltage differential signaling (LVDS) applications may be found in this category. The third class of parts represents leading-edge technology for cabling. These coaxial (single-mode) and twin-axial (differential mode) cable assemblies show up in the most demanding applications—automated test equipment used in IC production, and test setups for semiconductor design verification.
Pricing starts out relatively low in the first two categories. Cost per mated contact pair is around $0.02 for assemblies up to 50 MHz and $0.05 for those up to 300 MHz. But there's a premium to be paid for the highest-frequency cable assemblies, because they can be difficult to fabricate. Also, they require the highest-quality plastics. The cost of these products may be closer to $0.50 per pin.
One of the ways that high-speed cable assemblies can be improved is through the development of connectors with a lower dielectric constant, which improves the speed of signal propagation through the interconnect. For instance, Joy Signal Technology is working with a teflon-filled compound that has a dielectric constant of only 1.15 ns/in., versus 2.0 to 2.3 ns/in. for pure teflon.
This material is being used to build a MICTOR-style connector—originally designed by AMP of Harrisburg, Pa.—for operation at 1 GHz and above. The connector will feature contact-to-contact spacings of 0.025 in., a shielding system, and blind mating options.
Similarly, improvements in the dielectric of the cable itself can produce faster performance. According to Wilkinson, his company is working with another vendor to develop a cable assembly based on a cable that has a center conductor surrounded by air. Capable of operation at signal rates up to 5 GHz, this "air coax" has a propagation delay of 1.149 ns/in. Measuring the performance of such cables taxes the capabilities of existing test setups, though. So to test the air coax, it was necessary to generate signals with 35-ps rise times.
While new materials are being created to extend performance at the high end, less exotic approaches are being applied to develop cable assemblies with higher-speed performance for mainstream applications. Some are based on emerging industry standards.
One example is the MicroCross DVI (Digital Visual Interface) connector system by Molex Inc. of Lisle, Ill. This product supports digital and analog video in one connector system. Developed in support of the DDWG (Digital Display Working Group) DVI standard, it supports one or two digital channels driven by transition-minimized differential signaling, as well as a high-bandwidth analog interface. Digital signaling rates are greater than 1.65 Gbits/s per differential pair, and the analog interface offers 2.5 GHz of bandwidth.
The MicroCross DVI connector uses no special materials, relying instead on design techniques to achieve performance and flexibility at relatively low cost. For instance, whereas other digital video connectors typically configure pins in two-rows with centerline spacings of 0.050 in., the MicroCross DVI employs three rows on 0.075 in. As a result, it can accomodate a variety of cable types and wire gauges.
On the digital side, two factors enhance electrical performance. The LFH (low-force helix) contact—a split-beam contact that connects the pin and the receptacle in two places—offers contact resistance that is low and stable even with cycling of the connector. And, in the connector's mating and termination sections, use of an air dielectric lowers propagation delay.
The analog or MicroCross section consists of four signal pins (RGB video and sync) separated by crossing ground blades. The grounds form a coaxial structure that extends bandwidth beyond traditional VGA connectors, which may max out at 150 to 175 MHz.
The MicroCross DVI connector addresses the need for high-speed interconnect in lower-cost consumer systems. That's an area that's likely to see increased activity in the future as silicon vendors up the ante with faster chips with faster I/O. As they do, the pressure will be on connector developers to find new ways to build low-cost solutions for high-volume gigabit-speed applications.
|The following companies provided information for this article:|
Contech Research Inc.
ERNI Components Inc.
Joy Signal Technology
Thomas & Betts Corp.