EE Product News

Bridge IC Eases PCI/cPCI Upgrade To PCI-X/cPCI-X

Introduced as the industry's first PCI-X-to-PCI-X bus bridge, the Tsi320 provides a low-risk migration path from PCI and CompactPCI to higher bandwidth PCI-X and CompactPCI-X applications. PCI-X, a higher-speed version of PCI, is a 64-bit bus architecture that operates at speeds of up to 133 MHz, enabling data rates greater than 1 GB/s. It is one of the industry's most recent standards for connecting two or more I/O devices, and is said to overcome I/O bottlenecks that limit faster communication between processor and peripherals.
An advanced switching fabric makes up the core of the device (pictured left), said to reduce read/write-transaction latencies associated with bridging two buses. This architecture uses concurrent read prefetching and supports reads from multiple I/O devices in parallel, non-blocking streams.
Two bus interfaces are provided that can be configured as either PCI (25 to 66 MHz) or PCI-X (50 to 100 MHz). Systems configured with several Tsi320s can support multiple PCI-X and PCI buses operating at different speeds.
Other features include: dual modes of operation (transparent and non-transparent); four independent DMA channels supporting either direct or linked-list mode; a secondary bus arbiter with support for seven external masters; two UARTs; an I2C and EEPROM interface; message-signaled interrupts; CompactPCI hot-swap compatibility; support for JTAG; support for legacy devices; 352-pin BGA package; and universal 5V and 3.3V I/Os. Typical applications for the device include intelligent I/O and RAID controllers, servers, multi-function I/O boards, and PMC cards.


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