In the WED3C750A multi-chip package, designers gain a PowerPC 750 RISC processor and 1 Mbyte of synchronous SRAM L2 cache memory. The device is suited for embedded control applications where density and performance are priorities. The combination of the CPU and two 4-Mbit SSRAM devices on a single interposer results in 60% board space savings compared with discrete approaches, it’s claimed.The 200-MHz CPU and two 128k x 36, 100-MHz synchronous pipelined SRAM die are flip-chip attached on a 255 CBGA or optional ceramic column grid array. The module is optimized for low-power systems.
Company: WHITE ELECTRONIC DESIGNS CORP.
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