A strategic alliance between EVE and CoWare ties together the former’s accelerated hardware/software co-verification with the latter’s SystemC virtual platforms, reducing overall development time for multicore/multi-application SoCs.
Linking EVE’s ZeBu high-speed emulation with CoWare Platform Architect (which is used to create SystemC virtual platforms) is a fast transaction-level interface supported by ZeBu. The combination reduces the time and effort needed to verify SoC designs that include a mix of SystemC and register-transfer-level (RTL) blocks. This is accomplished by co-executing RTL blocks in ZeBu and SystemC transaction-level platform in CoWare Platform Architect. This approach allows for early design optimization using a wider set of test scenarios before engineering samples and prototyping boards are available, and can be used ahead of an RTL implementation of the complete SoC design.
And, according to the company, by reusing the ESL virtual platform––the SystemC platform and embedded software––the time to set up test environments to verify subsystem IP with ZeBu is reduced from previous design tasks. This improves design quality, enables the use of exact “golden reference” test streams for verification, and accelerates execution and debug to increase efficiency. The product development process is streamlined because complete system verification is completed before physical implementation.
Through the alliance, EVE and CoWare will work together to introduce complementary transactor strategies and roadmaps based on the emerging Open SystemC Initiative (OSCI) Transaction Level Modeling (TLM2) standard for model interoperability. Because this integration is IP vendor independent, it offers more flexible support for design-chain requirements of mutual customers.