The GateFlow family of extendible FPGAs includes installed cores featuring the company's Fast Fourier Transform (FFT) implemented on an FPGA-based dual-channel wideband receiver. The supplied GateFlow FPGA Design Kit facilitates custom algorithm development. Using a proprietary block memory architecture, the GateFlow FFT executes a pipelined complex 4-kpoint radix-4 FFT in just 10.24 µs. The GateFlow FPGA FFT engine is available as a factory-installed option to the 12-bit, 100-MHz Model 6235 dual-channel wideband digital receiver. The Model 6235 includes two complete acquisition and receiver channels in a VIM-2 (velocity interface mezzanine) module compatible with the company's 429x series PowerPC and C6000 VME processor boards. It can be equipped with either the XC2V1000 or XC2V3000 FPGA from the Xilinx Virtex-II family, offering logic densities of 1 million or 3 million gates, respectively. The Model 6235 dual-channel receiver with 1k GateFlow FFT starts at $11,995. With 4k GateFlow FFT, pricing starts at $12,995. The Model 4953 FPGA design kit costs $1500.
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