Why just build peripherals when it's possible to construct an entire SoC using an FPGA? Companies such as Altera, Xilinx, and Actel deliver low-complexity FPGAs with enough logic to implement a CPU and its peripherals (see "Programmable Logic Challenges Traditional ASIC SoC Designs," electronic design, April 15, p. 44).
Actel's largest flash memory-based ProASIC Plus series incorporates over 1 million gates and almost 200 kbits of RAM. This is more than sufficient to implement a RISC processor and a host of peripherals, although on-board programming requires an off-chip processor. Altera and Xilinx have multimegagate, SRAM-based technologies that have been used to implement complex processors and peripherals.
There are two problems with this approach, however. One is the amount of expertise required to configure a large FPGA. The other is that implementing a processor via an FPGA is less efficient than using a fixed CPU core.
FPGA configuration is often done using register transfer logic (RTL) or Verilog. This makes the design transferable to a custom ASIC once the design has been proven or volumes increase. The downside is that this level of design is beyond most embedded developers. Routing problems are significant when dealing with very large logic arrays versus smaller FPGAs found in an architecturally mixed environment.
Although many of the chips covered in this article use an FPGA, configuration of peripherals is frequently done with libraries of components instead of a fully customizable solution. This lets developers deal with peripherals from a logical standpoint instead of a low-level logic implementation.