JTAG Debug, Programming Tool Receives A Speed Boost

The latest release of the J-SCAN boundary-scan (JTAG) debug and programming tool communicates with the target device using a USB 2.0- and USB 1.1-compatible interface that runs in high-speed or full-speed mode. The result is a performance increase of more than 10X compared to the previous version. Additionally, J-SCAN Version 2.1 fully supports serial peripheral intervae (SPI) flash programming, for designers using FPGAs and other embedded devices. The included USB 2.0 download cable cuts flash programming time to minutes, rather than hours days, according to the company. Utilities to program FPGAs and CPLDs are also available.

J-SCAN works independently of any logic inside the JTAG device, so not special firmware, code, or logic needs to be installed. J-SCAN lets designers observe the behavior under the pins of a ball grid array device in real time or on a PC. The tool allows permits users to manually place the pins in any logic state with a simple point-and-click of the mouse. Engineers can observe logic-state transitions and instruction addresses sent and received across individual pins. Besides the USB 2.0 cable, the J-SCAN software package includes a demo board, power supply, and Getting Started tutorial manual.