Measuring 5 mm2, the Si5023 integrates a multi-rate clock and data recovery (CDR) unit, limiting amplifier (LA), on-board reference clock and voltage regulator into a single package. The latest addition to the SiPHY product family, the devices uses the company's DSPLL technology to achieve what's claimed as best in class jitter generation of 3 mUI. This is said to be more than three times better than the SONET/SDH specification.
To further simplify optical module applications, the external reference clock required for operation of other CDR+LA devices is optional for the device, thereby eliminating the need to provide a reference clock source within the module or externally through a pin on the module. Samples are available now.
Company: SILICON LABORATORIES INC.
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