Optimized DSPs "Rev Up" the Wireless Infrastructure

June 4, 2007
By Manish Patel, Texas Instruments Customized digital signal processors for base stations and other types of systems designed for wireless communications infrastructure (CI) are often among the fastest and most powerful processors on

By Manish Patel, Texas Instruments

Customized digital signal processors for base stations and other types of systems designed for wireless communications infrastructure (CI) are often among the fastest and most powerful processors on the market. But if raw megahertz is all that a CI system developer considers, he may miss some of the most critical attributes of CI-optimized DSPs, which drive down overall system costs, ease hardware and software design, future-proof the design for years to come and improve other important performance metrics. Ultimately, choosing a DSP optimized for CI applications over a general-purpose DSP will pay off in a big way for equipment manufactures and their customers, the service providers.

Diversity Demands Flexibility
On a practical level, the diversity and fluid nature of the CI marketplace demands that equipment manufacturers design a high degree of flexibility into their basic architecture. Global base station manufacturers, for example, must provide systems that can support a wide array of air interfaces, such as GSM, CDMA, UMTS, EDGE, China's TD-SCDMA and others. Moreover, a wider range of form factors is now being introduced. No longer does one size base station fit all. The latest configuration to come on the scene is the so-called "femto" base station, which is small enough to function as a wireless base station in a home. In addition to the femto, other form factors such as the pico, macro and super-macro are also popular these days. A base architecture that can cost-effectively scale to any and all form factors will certainly return dividends to the equipment manufacturer. For scalability, CI-optimized DSPs are at an advantage over general-purpose DSPs since the CI DSPs often include highly scalable high-speed serial interfaces like RapidIO. An example of this type of scalability is shown in Figure 1.

Board-level architectural issues also vary widely from one manufacturer to the next and among the various types of CI systems. In fact, individual circuit boards in a particular base station can play dramatically different roles. Some boards might be dedicated solely to receive signals, while others are devoted to transmit signals. Another board in the same system might perform system-level operational management and network control. Because of this broad range of functionality, the topology of the circuit boards within a system can vary widely. Ring structures, mesh architectures, switch fabrics, stars and others topologies are commonplace in the industry

Overlaid on top of all of these variables is the unrelenting development of new features, functionality and services, as well as the continuing development of industry standards. Without a certain degree of adaptability, a new base station design might be obsolete soon after it was introduced. Unlike generic DSPs which are better suited to general purpose signal processing, DSPs optimized specifically for base stations and other CI systems will have capabilities that ensure their adaptability to different air interfaces, form factors, box- and board-level architectures and ongoing developments.

Survival of the Adaptable
DSPs survive in the jungle that is today's CI marketplace by optimizing their adaptability. For example, programmable CI DSPs have the ability to support several air interfaces. This simplifies the new product development for equipment manufacturers since engineers can concentrate on learning the intricacies of one DSP or a family of DSPs rather than using a different DSP for each air interface. In addition, consistent DSP technology across several base station platforms simplifies the manufacturer's technical support and field service programs.

The input/output resources on a DSP also have a profound effect on the form factors, scalability and range of architectures it can effectively support. Unlike many off-the-shelf DSPs, which are often equipped with general-purpose peripheral interfaces like Gigabit Ethernet and PCI Express, CI-optimized DSPs include high-speed serial interfaces like Serial RapidIO, which can be utilized as a direct DSP-to-DSP or chip-to-chip interconnect, as well as a backplane bus. Increasingly, the open-standard RapidIO bus is becoming a critical capability in next-generation base stations and other CI systems due to its inherent flexibility and high throughput rates. A RapidIO interconnect is made up of two or four differential pairs of serial lines, each with a data rate of 3.125 gigabits per second for a total potential throughput rate of more than 12 Gb/s. Due to the flexibility in configuring RapidIO serial lines, a platform's basic capabilities can be easily scaled upward by adding more DSPs, or a wide variety of architectures can be configured by rearranging the serial chip-to-chip interconnects (See Figure 2).

Besides including high-speed peripheral interfaces like RapidIO, DSPs for CI applications include selected accelerators and co-processors, which you don't usually find in off-the-shelf DSPs. These co-processors free up the DSP core to perform other functions. A generic DSP will not have these wireless-focused accelerators and thus will perform at a lower level, consuming more processing cycles and requiring more code to perform its functions.

Other types of high-speed interfaces, such as OBSAI / CPRI, are not typically found on off-the-shelf DSPs, but are becoming increasingly important in CI applications, since they augment the adaptability of the on-board DSPs as well as enhance the throughput of the system. These interfaces are predominately used to connect antenna interface data to the DSP for baseband processing.

Mounting Performance Pressures
The growing number of new wireless subscribers requires that infrastructure systems continually improve their performance levels for both voice and data traffic. Advancements in DSP technologies over the years have allowed system designers to increase performance by simply adding more DSPs to base station circuit boards. Unfortunately, this type of strategy has its limits. The physical space on circuit boards limits the number of DSPs that can be placed on a board, and too many DSPs on the same circuit board can trigger a heat problem from power dissipation. High temperatures in the compact enclosure of a base station can quickly erode the reliability of the electronics.

Unlike other multi-core DSP processors, specialized multi-core DSPs for CI applications incorporate a power saving mechanism to minimize heat dissipation. This allows a higher throughput performance in the same space and reduces the risks of overheating the system. Moreover, some DSPs designed specifically for CI systems have been equipped with power and performance monitoring capabilities.

The DSP chip itself is cognizant of the system's operating temperature and, without sacrificing performance throughput, it can scale back its core voltage to reduce power and heat dissipation. This allows the CI DSP to operate at its intended performance level while keeping the overall power budget in check.

Several CI DSPs also feature co-processors on-chip, some of which perform very specialized wireless communications tasks. For example, Viterbi co-processors for voice processing are proving that they can be very useful, and data-oriented co-processors can accelerate data traffic. By offloading these tasks from the main DSP core or cores, co-processors are able to improve the device's data throughput rate and retain core DSP resources for more critical functions. Moreover, specialized co-processors perform functions like receive acceleration for certain air interfaces. One such receive accelerator accepts W-CDMA antenna signals and performs significant correlation processes on the data before forwarding it to the DSP.

With the integration of specialized co-processor functionality into CI DSPs the need for discrete devices to perform these tasks is diminished. In many base station designs, for example, ASICs or FPGAs are often deployed alongside DSPs to process ancillary tasks. In some cases, a CI-optimized DSP can perform these tasks and thus reduce chip count and overall system cost. Carrying this trend a step further, some DSPs for CI applications have been optimized to perform network control operations, eliminating the need for the general-purpose microprocessor or RISC processor, which is typically dedicated to these functions.

Software Shortcuts
The software environment and architecture of a DSP intended for CI applications can also have a tremendous effect on a system's throughput performance, overall cost of development and time-to-market. New or enhanced instructions are commonly integrated into CI DSPs for certain repetitive functions that are specific to wireless communications. For example, a new instruction set architecture (ISA) might enhance a DSP's performance in a base station by accelerating its symbol rate, chip rate and matrix math processing. An advanced ISA will also lower the system's cost-per-channel by enabling denser circuit boards. An effective ISA will reduce the size of the system's software code, reducing the amount of board space devoted to external memory or freeing up storage capacity for mission-critical data (See Figure 3). General-purpose DSPs can certainly be programmed to perform communications functions, but without a CI-specific ISA the same function running on a generic DSP will require three or four times as many instructions, much more code space and more programming time than it would on an optimized DSP equipped with a CI ISA.

In addition to an ISA targeted at CI applications, some vendors also supply libraries of CI functional routines that have been optimized specifically for the DSP. With one command these routines can perform multiple functions that might otherwise execute individually, again reducing code size and speeding performance.

Software continuity from one generation of CI DSP to the next also has a significant impact on development cycles and on a new CI system's time-to-market. To maintain reasonable development costs, the majority of the software from one DSP must be migrated and re-used on the next generation device.

Optimized for CI
With the many intricacies, complexities and specialized requirements of the CI marketplace, most general-purpose DSPs fall short of CI-optimized DSPs in applications like wireless base stations. Deploying off-the-shelf DSPs in demanding infrastructure systems will require additional design work by the manufacturer, lengthening the system's time-to-market. In contrast, CI-specific DSPs are among the most powerful on the market in terms of clock speeds. But just as importantly, they also offer the right set of peripheral and memory interfaces with the appropriate accelerators, high-speed internal memory, communications co-processors, sophisticated CI-specific software and a host of other capabilities that streamline system development and accelerate the delivery of high-throughput systems.

Manish Patel is a Wireless Infrastructure Marketing Manager, DSP Systems at Texas Instruments Inc. He can be reached by email at [email protected] or by phone at (281) 274-4257.

Company: TEXAS INSTRUMENTS INC.

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