For decades, multiple ongoing factors have been influencing the design of integrated systems. Chief among them are smaller form factors, greater complexity coupled with improved performance, shorter design cycle times, and lower costs. Each brings its own distinct set of challenges and trends to system design.
Increasing device integration drives the need for IC packages with over 1500 contacts. FPGAs in particular have taken enormous leaps in complexity and performance (see the figure). This in turn drives advanced fabrication technologies to facilitate placing the devices on a pc board. Technologies introduced in the days of MCM/hybrids to handle high density have seen a resurgence on pc boards. These technologies include embedded passives, HDI/microvias, and chip and wire device connections.
Signals with 10-Gbit/s and higher data rates are now becoming commonplace on pc boards. As silicon vendors replace parallel bus architectures with serial asynchronous versions, traditional high-speed design challenges like delay, timing, crosstalk, and overshoot are replaced by jitter, lossy lines, and bit-error rates. In other words, for today's high-speed routing and verification processes, following "rules of thumb" is no longer a reliable, or viable, design practice. Design systems must now facilitate definition of advanced constraints, adherence to those constraints throughout the design process, and verification with multilingual device models.
To optimize design cycle time and cost, design-team and hardware resources must be effectively utilized. Vendors of pc-board tools have begun to facilitate collaboration between local as well as geographically dispersed design teams.
From the standpoint of physical layout, there's a drive to streamline the constraint-driven layout process. Today's pc boards are very complex affairs with multiple split voltage planes. Managing return paths and decoupling is an increasingly difficult problem. New tools will bring breakthroughs in automated constraint-driven routing.