Among the greatest challenges in designing today's power-consuming products is how to manage the system's thermal budget. Most electronic equipment includes some form of power conversion; therefore, it's necessary to understand the design's thermal constraints that form the context for many design decisions.
Design engineers make a number of tradeoffs to mitigate thermal problems. Among them are choices of power-conversion topology, switching frequency, semiconductor packaging, semiconductor type, heat sinking, the conversion circuit's location, circuit- board material, and cost. Complicating matters are questions regarding the need for forced-air convection or, for high power-density applications, liquid cooling. From this list of options and constraints, temperature estimates are necessary to determine the impact of the various choices before finalising the design.
In most power-conversion circuits, the hottest elements are the power semiconductors-diodes, MOSFETs, and IGBTs. For a given circuit topology, these components heat up as functions of applied voltage, load current, switching frequency, gate-drive circuit, package type, and mounting. Of these, the first four dissipate power and model as thermal sources; the last two model as thermal sinks because they remove heat from the system.
A good first-order estimate of power-semiconductor power dissipation in switch-mode circuits is P=DVI. Here, I is the average conduction-cycle current through the power semiconductor, V is the average conduction-cycle voltage across the device, and D is the duty cycle.
In physical circuits, current is a function of circuit operation. Voltage is a function of current, the device type, junction temperature, and semiconductor-control method. For example, the forward voltage across a diode is simply a function of current and temperature. The voltage across a MOSFET in the on state is IDRDS(ON)-which is the product of drain current and channel resistance. RDS(ON), in turn, is a function of ID, gate drive, and temperature. The voltage across an IGBT in the on state, V=VCE(SAT), is a function of current, gate drive, and temperature.
To determine the semiconductor's temperature rise, multiply the power dissipation by the thermal impedance. The limitation with this analysis is that it oversimplifies the power calculation and doesn't account for transient conditions. The power device's datasheet provides thermal- response curves, however, with which you can overcome that limitation (Fig. 1).
The curves assume a rectangular power pulse of amplitude P for duration t with duty cycle D. Follow the curve appropriate to your circuit's duty cycle to the point along the horizontal axis corresponding to the pulse duration. Read the corresponding thermal response from the vertical axis and multiply that value by the power dissipation to arrive at the temperature rise from case to junction.
The thermal-response curves only address the case-to-junction temperature rise. They can't account for the case's mounting method, which contributes to its rise above ambient as indicated by a complete thermal-stack model (Fig. 2).
Rather than approach the problem piece by piece, using different tools and data sources to solve each part of the problem, a circuit simulator can calculate the total thermal response. The simulator also allows you to observe the thermal system's effect on the circuit's parametric performance, which is difficult to deduce from pen-and-paper or spreadsheet analysis.
Circuit simulation uses component models and network analysis, which closely approximates the operating conditions for each device in the circuit. The simulator automatically calculates the power dissipation of power devices, taking into account a full range of circuit and device behaviours including gate drive, switching transitions, and diode reverse-recovery.
Traditional circuit simulators calculate power based on a static thermal model, though. In other words, they fix device behaviour with respect to temperature. This is adequate for lowpower IC simulations, because devices in such circuits exhibit little self-heating. Power semiconductors do self-heat, however, and an accurate simulation must account for the device behaviour's temperature dependence. Adding a quasi-dynamic thermal wrapper model to the static 25°C device model overcomes this limitation (Fig. 3).
Spice, the de-facto standard simulator in electronics engineering, can implement the thermal wrapper in macro models. Popular non-Spice simulators are able to implement the thermal wrapper with macro models as well. Alternatively, they can implement the thermal wrapper in a hardware description language, such as VHDL-AMS for Ansoft's Simplorer, MAST for Synopsys's Saber, or Verilog for Cadence's Spector simulators. Because all of these simulators can use macro models, this article will focus on that approach and model a power MOSFET as an example.
In our example, the thermal wrapper must implement two temperature dependent MOSFET parameters: The threshold voltage, VTH, and the fully enhanced channel resistance, RDS(ON). The temperature coefficient of VTH is approximately 7mV/°C. RDS(ON)'s temperature dependence models reasonably well with a quadratic. Implementing the mathematical relationships is easy; deriving the operating temperature that drives these functions is the challenge.
The thermal system usually models as a ladder network comprising Rs and Cs with a step response resembling the single- pulse curve in Figure 1. Most new MOSFET datasheets include the ladder network like that in Figure 1; older datasheets only provide the curves. In this ladder model, power is analogous to current and temperature is analogous to voltage.
The first item to obtain for the thermal-wrapper model is channel resistance as a function of temperature, RDS(ON)(TJ), which all MOSFET datasheets provide in the form of a characteristic curve. A simple quadratic curvefitting routine can provide the three coefficients in the form the model requires:
RDS(ON)(TJ) - RDS(ON)(25°C) x (aTJ2 + bTJ + c)
The simulator computes the value of RDS(ON)(25°C) from the device's Spice model. Taking the derivative of the channel resistance with respect to temperature yields an expression for the selfheating effect on RDS(ON):
dRDS(ON)(TJ) = RDS(ON)(25°C) x (2aTJ + b)dTJ Add dRDS(ON) as a resistor in series with the MOSFET's drain.
The next step calculates TJ from the MOSFET's instantaneous power. Neglecting switching losses in RG, the gate-interconnect resistance, this is simply: p = iDvDS. This power term serves as the source to the thermal ladder network (Fig. 4). Note that the absolute-value block in the figure is necessary because power dissipation always adds heat to the system no matter the sign of the voltage or current. The output of this model is a voltage that corresponds to TJ.
Finally, the shift in VTH compared to the nominal 25°C threshold is simply:
dVTH(TJ) = -7(mV/°C) x (TJ - 25°C)
This term appears as a floating voltage source in series with the MOSFET's gate terminal.
With the characterizing equations in hand, creating the model is straightforward. Obtain the MOSFET's datasheet, Spice model, and thermal network from its manufacturer. Newer MOSFET datasheets include the thermal networks. Obtain or calculate the quadratic coefficients that describe RDS(ON)'s temperature coefficient. Finally, implement the macro model including the equations for dRDS(ON)(TJ), the absolute value of the instantaneous power, and dVTH(TJ) (Fig. 5).
The if-else statements in Figure 5 account for the MOSFET's state during simulation. If VDS is greater than 100mV, a 1-μΩ resistance adds to the channel. The model assumes that the MOSFET is fully on if VDS is less than 100mV and it adds the temperature-dependent dRDS(ON). In this simple model, Ta is the case temperature. It's easy to expand the thermal network, however, to include a heatsink's performance and its effect on the system.