Electronic Design

Power Architecture Group Defines High-Speed Serial Trace Spec

Power.org has released the Power Architecture Physical Connection for High-Speed Serial Trace Specification. The organization, which promotes and develops standards for Power Architecture technology, also announced web-based training tools, regional training programs, and its newest member, LSI Corp.

The Power Architecture Physical Connection for High-Speed Serial Trace Specification defines the high-speed serial protocol and the connection method for tracing programs through a system. This will improve efficiency and cut the time required to debug Power Architecture devices. The specification was developed collaboratively by AMCC, Freescale Semiconductor, IBM, Lauterbach Datentechnik, Mentor Graphics, Wind River, and Xilinx. The serial protocol is scalable, occupies minimal printed-circuit board space, and employs commonly used physical layers.

“Until now engineers had no efficient way to trace the program execution on a Power Architecture design,” said Charlie Ayer, member of the technical staff at Wind River. “By defining the high-speed serial protocol and the connection method, we’ve eliminated this challenge and given designers a standardized solution with a flexible configuration that can support virtually any design.”

The organization, which held Power Architecture technology conferences in Paris and Munich, will hold a series of similar one-day events in Asia in October. Power Architecture experts will present technology updates and practical training to design teams developing next-generation systems. In addition, engineering managers, system architects, and product developers will gain access to the latest Power Architecture product roadmaps and products. Sessions will be held in Hsinchu, Taiwan; Tokyo, Japan; and Beijing, China.


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