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Electronic Design

Power-Management Challenges Abound At The Board Level

Power-system design at the board level has long been dominated by such issues as efficiency, thermal management, voltage regulation, reliability, design size, and cost.

Power-system design at the board level has long been dominated by such issues as efficiency, thermal management, voltage regulation, reliability, design size, and cost. Going forward, these factors will remain critical, particularly in the face of falling supply voltages and rising current demands. Yet as power-supply requirements become more varied across the pc board, the question of how to distribute power across the board will expand to how to control the application of power across the board.

Concerns over power-system performance will need to be balanced with concerns over power-system complexity. To this end, power-semiconductor and power-supply vendors appear poised to increase the set of control features offered in power-supply controller ICs and on-board dc-dc converters. In fact, this effort has already begun with some recent product announcements pointing the way to future product-development trends.1, 2

Emerging power-supply control issues result naturally from the proliferation of different IC device types, fabricated in various semiconductor processes, on pc boards. Power-supply requirements vary among analog, mixed-signal, and logic devices. Even within the logic category, many DSPs, ASICs, FPGAs, and microprocessors need two or more supply voltages. Typically, these parts require a low-voltage supply to power a logic core and a higher voltage to power an I/O interface.

But beyond the number of supply voltages and related supply specs that breed complexity in powering the system, there also are the various timing requirements for applying power to the chips. Many semiconductor device vendors specify voltage and timing restrictions for their parts during power-up and power-down.

Typically, these restrictions dictate that some form of power-supply sequencing be employed. Two supplies can be powered up sequentially so either the core or I/O voltage reaches its nominal value first. One form of sequencing is tracking, also known as simultaneous sequencing. In this case, both supplies are turned on at the same time and ramped up at the same rate.

On a given pc board, multiple semiconductor devices exist with different power sequencing requirements. Even when two different devices share the same supply voltage levels, their requirements for sequencing may vary.

But power management doesn't end when all necessary supply voltages are turned on. Once the supplies reach their nominal values, power-management circuitry must generate the logic signals needed to activate the various devices on board, monitor supplies to detect any faults, and finally shut down the supplies with the required sequencing. These functions can be diagrammed as a five-phase power-management cycle (Fig. 1).3

Although power-supply monitoring is shown in phase four of the diagram, this function usually must be performed starting with the second phase. If supplies don't ramp up properly, the power-management system may need to jump to phase five for shutdown.

As Figure 1 reflects, power management at the board level consists of three basic tasks: sourcing the needed supplies, sequencing them, and monitoring them. Various means are available to implement these functions.

A very basic form of sequencing can be accomplished with isolated dc-dc converters (bricks) and nonisolated point-of-load converters (POLs). At the system level, a converter's enable pin may be toggled to turn its output "on." In addition, the power-good output from one converter may be used to trigger the enable pin of another converter. Similar techniques can be applied with embedded dc-dc converters built around power-supply controller ICs.

The caveat with this approach is that loose tolerances in converter startup time and ramp rates may make it difficult to sequence two separate converters. In particular, this approach is ill suited for tracking two supplies. Sequencing the power-down of bricks and POLs is similarly difficult because of variations in loads and converter output impedances.

More reliable approaches to sequencing and tracking typically require external components. One way is to control the supply outputs with series FETs, while checking supply levels with voltage-monitor ICs. The voltage-monitoring functions are sometimes incorporated within power-management ASICs and even within more generic, programmable power-management ICs. The latter devices can monitor and control multiple supplies while offering leeway in programming such factors as turn-on delays and ramp rates.

The different approaches to sequencing have some tradeoffs—the number of components required, board space necessary, flexibility, cost, and ease of use. Then there are the arguments against using FET load switches, most specifically that they take up space and sacrifice some efficiency. Furthermore, some system designers would like a simpler means of implementing power sequencing. With these arguments in mind, semiconductor and power-supply vendors have begun to integrate the sequencing functions into their power-supply controllers and dc-dc converters.4 For example, a dc-dc converter IC with integrated MOSFET can be programmed using one pin to do power-up or power-down sequencing.

Another control feature beginning to appear on power-supply controllers is margining. With margining, users can "exercise" a system by raising and lowering the supply voltage over a limited range of perhaps ±5%. Such an exercise allows customers to validate the performance and reliability of their system in production.

Similarly, power-supply vendors are working to integrate sequencing within board-mounted dc-dc converters. At least one vendor offers a nonisolated POL that permits tracking of the outputs on two separate POLs.5 In this case, the on/off pins of the two POLs are tied together so that the two converters turn on at the same time and ramp up with the same rate. Later this year, the same vendor expects to introduce a POL converter with a more sophisticated power-sequencing control. Likewise, the brick manufacturers are planning isolated dc-dc converters with built-in sequencing.6

Margining poses less of a challenge for dc-dc converters because many already feature programmable or trimmable outputs. But down the road, some converter vendors may offer an I2C interface to simplify control of margining.

Future efforts to embed sequencing and other power-control features will no doubt be influenced by the decline in supply voltages associated with the migration to more advanced semiconductor processes.

As semiconductor device makers introduce chips to run off of lower supply voltages, they're expected to tighten their requirements for voltage regulation. For example, at 3.3 V, a tolerance of ±5% is common. But when the supply falls to 1.2 V, a tolerance of ±3% is more likely. Demand for greater accuracy in the supply will affect the development of supervisory ICs, like voltage monitors and power-on reset ICs, which typically try to detect a low-voltage condition on the supply. The specified accuracy of these chips reflects their ability to detect low voltage.

As the supply voltage falls and chip makers tighten the acceptable tolerance on the power supply, the accuracy of the voltage monitor must increase as well. So while 2% accuracy may be adequate for monitoring a 3.3-V ±5% supply, an accuracy of 1% might be needed to monitor a 1.2-V ±1% supply. Although supply voltage tolerances will vary among chips, the trend points to greater accuracy (Fig. 2).

There also is an element of uncertainty in power-system design that may affect requirements for voltage monitoring. For a given IC, the supply-voltage specification may change from the time that preliminary data sheets are issued to when first silicon comes out. As a result, system designers may need to rely on power-management chips with programmable voltage settings.

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