Radio Front End Enlists Popular FPGAs

Sept. 22, 2004
For compute-intensive applications, the Model 6256 software radio front end employs two 105-MHz, 14-bit a/d converters and two user-configurable Virtex-II Pro FPGAs. Up to two boards can be mounted on the company's VIM baseboards while maintaining a

For compute-intensive applications, the Model 6256 software radio front end employs two 105-MHz, 14-bit a/d converters and two user-configurable Virtex-II Pro FPGAs. Up to two boards can be mounted on the company's VIM baseboards while maintaining a single-slot configuration. This single-slot, dual 6256 combination provides four a/d channels and 24 million FPGA gates. The board includes 84 interconnects between the two FPGAs and supports dedicated FPGA paths from each a/d converter. Each FPGA is connected to 64 MB of SDRAM with a separate address and data buses, allowing independent access from each FPGA. Additionally, 16 MB of flash memory is attached to each FPGA to handle boot and program code for the PowerPC processors. Development support is via the ReadyFlow board-support library, which includes C-callable device functions, mezzanine board control, DMA data transfers, data formatting, and interrupt resource management. Drivers for Linux are also available. Price starts at $7,195. PENTEK INC., Upper Saddle River, NJ. (201) 818-5900

Company: PENTEK INC

Product URL: Click here for more information

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