Razor-Thin Package Sharpens Image-Sensing Applications

Feb. 15, 2007
Get out the microscope, because packaging for image sensors and other optical devices has reached a new level of "thin." Thanks to its Shellcase razor-thin (RT), wafer-level, chip-scale packaging (WLCSP) process, Tessera Technologies has produced a

Get out the microscope, because packaging for image sensors and other optical devices has reached a new level of "thin." Thanks to its Shellcase razor-thin (RT), wafer-level, chip-scale packaging (WLCSP) process, Tessera Technologies has produced a package that's a mere 0.5 mm thick. Low-profile camera modules for mobile phones, digital cameras, computers, automotive electronics, security, and optical imaging applications will benefit (Fig. 1).

The RT process is compatible with ball-grid-array (BGA) and land-grid-array (LGA) packages. Like the Shellcase CF technology introduced last year, the RT process is designed for high-yielding wafer-level packaging, surface-mount technology (SMT), and chip-on-board (CoB) assembly.

RT leverages a glass-sealing technology acquired by Tessera when it purchased the Israeli-based Shellcase Technology two years ago. The glass seal protects the sensor's imaging area from contamination at the initial stage of packaging, providing high assembly yields, largely irrespective of the imager's resolution or pixel size. The glass cover has excellent optical properties with a transmittance of 91.2% from 350 to 900 nm.

The RT family is a fourth-generation implementation of Shellcase's wafer-level packaging technologies, starting with the OP family. This was followed by the OC and CF families, the latter of which was designed for improving yields in CoB assembly.

Also, the RT family employs a thin polymer on one side of the chip—instead of the previous two-sided glass sandwich—to obtain the 0.5-mm package profile (compared to the 0.9 mm of the OC family). This makes for a more rugged package, as well as a package that's 44% thinner than previous generations. Package height (excluding the BGA) is about 400 µm, ±25 µm.

Furthermore, the RT version sheds heat more easily than its predecessor. It's insensitive to moisture and more rugged overall, suiting it for a range of harsh environments like automotive, military, and aerospace, in addition to a broad spectrum of consumer applications. In fact, the moisture-sensitivity level meets the Joint Electron Device Engineering Council (JEDEC) MSL 1 standard of 2000 cycles from –40°C to 125°C, the industry's highest rating. It represents an improvement over the JEDEC MSL 2 rating of the OC family.

TIGHTER DESIGN RULES
Such an arrangement allows for tighter design rules, prompting greater silicon utilization as well. Scribe-line widths are reduced from 260 and 250 µm down to 100 µm. Bond pad sizes dropped from 150 by 50 µm to 70 by 50 µm. And, the bond pad pitch was reduced from 350 to 180 µm (Fig. 2).

"The use of a polymer instead of glass on one side allows us to make the package thinner and improves thermal conductivity," says Craig Mitchell, Tessera's vice president of business development. "We can also add filler materials to the polymer to make things even thinner and to improve thermal conductivity," he adds, hinting at an even thinner package in the future.

"The LCD used to be the limiting factor in how thin you can make a telephone handset, but that distinction now belongs to the camera module," says Mitchell. "Our thinner packaging can enable the camera module to be thinned down."

The RT process suits either CMOS (the main application) or CCD sensors at resolutions up to VGA levels. Moreover, since CoB mounting accounts for about 60% of all mobile-phone modules, the RT development can significantly impact camera-integrator cost.

The first step in the RT process involves encapsulating the wafer with a glass cover at the initial stage of processing. Next, solder bumps are formed on the wafer's backside. This is followed by routing electrical contacts to the wafer's backside. Finally, the wafer is singulated into individually packaged dice (Fig. 3).

THE FUTURE LOOKS STRONG
Tessera foresees many imaging applications for its RT technology beyond mobile phones, like digital cameras, PDAs, laptop computers, fax machines, digital scanners, CD/DVD portable players, machine vision, and automotive applications including collision avoidance. Prototype samples are available, and the company is ready to license the technology to interested parties.

Tessera Technologies
www.tessera.com

About the Author

Roger Allan

Roger Allan is an electronics journalism veteran, and served as Electronic Design's Executive Editor for 15 of those years. He has covered just about every technology beat from semiconductors, components, packaging and power devices, to communications, test and measurement, automotive electronics, robotics, medical electronics, military electronics, robotics, and industrial electronics. His specialties include MEMS and nanoelectronics technologies. He is a contributor to the McGraw Hill Annual Encyclopedia of Science and Technology. He is also a Life Senior Member of the IEEE and holds a BSEE from New York University's School of Engineering and Science. Roger has worked for major electronics magazines besides Electronic Design, including the IEEE Spectrum, Electronics, EDN, Electronic Products, and the British New Scientist. He also has working experience in the electronics industry as a design engineer in filters, power supplies and control systems.

After his retirement from Electronic Design Magazine, He has been extensively contributing articles for Penton’s Electronic Design, Power Electronics Technology, Energy Efficiency and Technology (EE&T) and Microwaves RF Magazine, covering all of the aforementioned electronics segments as well as energy efficiency, harvesting and related technologies. He has also contributed articles to other electronics technology magazines worldwide.

He is a “jack of all trades and a master in leading-edge technologies” like MEMS, nanolectronics, autonomous vehicles, artificial intelligence, military electronics, biometrics, implantable medical devices, and energy harvesting and related technologies.

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