EE Product News

SDRAM MCMs Enhance PowerPC µPs

Packing 8M x 64 or 8M x 72 of synchronous DRAM in a multi-chip module (MCM), these registered-type CMOS memories are designed to complement PowerPC and other memory controllers by enhancing their performance at 66- and 100-MHz bus speeds. Each of the MCM’s four chips is internally configured as a quad-bank DRAM with a synchronous interface, with the device using an internal pipelined architecture to achieve high-speed operation. And column address can be changed every clock cycle, with read and write access burst oriented.
The 3.3V SDRAMs are housed in 219-pin PBGAs, which slash board space requirements by 33%-60% compared to discrete versions of the memories. The 8M x 72 WEDPN8M72VR-XBC module has a starting price of


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