EE Product News

Security Features Protect Low-Power FPGAs

A low-power FPGA family is protected by a slew of security features. The Cyclone III LS FPGAs include a comprehensive information-assurance design suite that offers anti-tamper, design-security and design-separation capabilities. These devices use less than 0.25 W of static power for 200k logic elements. To protect highly sensitive information, the Cyclone III LS FPGAs’ ofers JTAG port protection, tamper monitoring, and cyclical redundancy check (CRC). A proven industry-standard AES 256-bit encryption key provides another layer of protection. Where size, weight, and power (SWaP) requirements are crucial, a design-separation feature enables high-assurance and industrial-safety applications in a single chip through logic, routing, and I/O bank separation. Cyclone III LS FPGAs allow a one-chip solution for next-generation military applications such as software-defined radio, crypto-subsystems, and crypto modernization equipment where long battery life, density at the lowest power, and small board space are required. The Cyclone III LS devices are shipping now. ALTERA CORP., San Jose, CA. (800) 767-3753.


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