SerDes Chipset Stifles Jitter

Oct. 8, 2008
The DS32ELX0421 serializer and DS32ELX0124 deserializer chipset delivers an output jitter performance of 35 ps peak-to-peak and a jitter tolerance of 0.9 units interval with a bit error rate of 10-15. The chipset serializes data at rates up to 3.125

The DS32ELX0421 serializer and DS32ELX0124 deserializer chipset delivers an output jitter performance of 35 ps peak-to-peak and a jitter tolerance of 0.9 units interval with a bit error rate of 10-15. The chipset serializes data at rates up to 3.125 Gb/s, making them suitable for use in medical/industrial imaging, communications infrastructure, commercial displays, and test-and-measurement systems. They integrate signal and clock conditioning circuitry that extends the transmission reach of CAT-6 cable beyond 20m and they support a wide variety of interconnects including CAT-5 cable, optical fiber, 50-or 75-Ohm coaxial cable, and FR-4 backplanes. A unique SerDes architecture replaces the traditional wide single-ended parallel bus with a five-bit LVDS interface. This interface promises to simplify board layout by reducing the number of I/O pins and traces between the serializer, deserializer, and FPGA. Prices for the DS32ELX0421 serializer and DS32ELX0124 deserializer are $18 each/1,000. NATIONAL SEMICONDUCTOR CORP., Santa Clara, CA. (800) 272-9959.

Company: NATIONAL SEMICONDUCTOR CORP.

Product URL: Click here for more information

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