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Electronic Design

SoC Designers Can Learn IP Reuse From PC-Board Design

With all of the attention focused on system-on-a-chip (SoC) design, we tend to forget the "good old days" when system integration occurred just in pc-board design. Wasn't life much easier back then? Design teams had reusable components with ambiguous datasheets, but reference designs were available to show how to "design in" the different pieces. The components would be integrated and assembled, and design teams only had to worry about the interfaces and the software configuring the board.

Then SoC arrived. In addition to its silicon real estate, SoC brought the promise of integrating processors, dedicated hardware execution units, and peripherals on one piece of silicon. Blocks of silicon intellectual property (SIP) began getting a lot of attention.

In the early days of SIP reuse, design teams seemed to prefer soft SIP, which could be resynthesized after appropriate modifications. The ability to apply flexible modifications was considered a big plus. If you didn't like the way the controller or an interface worked, you could simply modify it.

But there was a trap! Once modified, the new, custom-tailored IP had to be completely reverified. Because verification required a significant part of the overall development cycle, the time saved by reusing SIP was lost in verifying the changes that were made. Today, SIP reuse must be viewed in perspective to other important industry movements, like the trend toward platform-based design and the adoption of abstraction.

Typically targeted at specific application domains, platform-based SoC design provides predefined topologies of silicon architectures to the system user together with libraries for standard hardware and software components that support the platform. This design style supports the technique of SIP reuse without modification, just as it does in pc-board design.

The reused blocks comply with the standard interfaces supported on the platform, so they don't have to be adapted. The platform can be used for a variety of derivatives within the chosen application domain. The differentiation is achieved via software configuration or programmable hardware. Prominent examples are the Texas Instruments Open Multimedia Applications Platform (OMAP) and the Philips Semiconductors Nexperia platform.

Using abstraction in the design process allows design teams to move beyond register-transfer-level (RTL) de-sign and to assess integration aspects early in the design cycle. As in pc-board design, the reference board becomes the abstract virtual reference model. This empowers the design chain between the system integrator and the SoC provider. The virtual reference model reflects implementation characteristics, such as performance and energy consumption. It's used to evaluate integration aspects and determine whether additional functionality can be implemented on the same platform.

From the abstract level, it's possible to employ technologies to automatically assemble the interfaces between hardware and software modules—just as jumpers and physical cuts did in pc-board design. This increased automation and abstraction lets design teams better concentrate on optimizing the functional and architectural aspects of the system. An example supporting abstract platform-based design is the Cadence Virtual Component Co-Design (VCC) Environment. This is the industry's first system-level development environment for platform-based hardware/software co-design and SIP reuse.

So, it turns out that IP reuse isn't very different in SoC design after all.

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