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SPI-4.2 Switch Seeks PCB Interconnections

Reported to be the first clock-less chip for handling board-level system interconnect assignments, the PivotPoint SPI-4.2 switch is designed to convert a fixed hardware configuration into a soft-assignable array of computing and packet processing resources. Capable of replacing discrete, daisy-chain designs and rigid system buses, the chip is said to cut system costs in certain applications by up to 25% by eliminating FPGA glue logic and reducing the amount of processing resources needed. The first device in the switch family, the FM1010, features six SPI-4.2 interfaces, a configurable generic CPU interface, and an IEEE 1149 JTAG interface. It employs the company's Nexus crossbar switch that provides a total switching capacity of 1.6 Tb/s and delivers 192 Gb/s of sustained non-blocking throughput with 3 ns of switching and arbitration latency. Maximum power consumption is 2W per active interface at 14.4 Gb/s. The SPI-4.2 switch is housed in a 1,036-ball BGA package. Samples and a development platform are scheduled to become available in October with general availability in January 2004. Price is $200 each/1,000. FULCRUM MICROSYSTEMS, Calabasas Hills, CA. (818) 871-8100.


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