EE Product News

Stacked Chip-Scale Packages Carry Flash & SRAM

Five different combinations of flash and static RAM densities and widths can be obtained in stacked chip-scale packages that dramatically reduce board space requirements. The packages can reduce by up to one-third the mounting space needed for two conventional TSOP packages. IC die are stacked on top of each other to achieve the space reduction.Occupying 80 square millimeters of space with maximum height of 1.4 mm, the stacked chip-scale memories can contain, for example, 16M (x8) of flash memory with 2M (x8) of SRAM (Model LRS1310A) or 8M (x16) of boot-block flash with 1M (x16) of SRAM (Model LRS1314). In all cases, the packages have a 0.8-mm ball pitch for use in portable electronics where available board space continues to decrease. Primary applications include cellular phones, pagers and personal information tools. Samples of all five memory combinations will be available in the third quarter.


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