Electronic Design

Swap Out Pricey Buffer Solutions With Denser, Faster Dual-Port And FIFO Memories

Higher density and faster memories were added to IDT's multiport and first-in/first-out (FIFO) families. The dual-port family now features a 36-Mbit synchronous dual-port device that IDT says offers the industry's highest density. The chip operates at up to 133 MHz to address wireless basestations; routers; Ethernet, ATM, and storage switches; and other demanding applications. The standalone TeraSync FIFO, which supports 18 Mbits of data buffering at 225 MHz, can replace costlier multichip, high-speed buffer solutions.

The 70T3509M dual-port memory is organized as 1 Mword by 36 bits. It reduces system design time and cost by eliminating the need to connect multiple devices in applications requiring a large shared memory. The chip also provides a comprehensive range of synchronous functions, allowing designers to optimize their design. These synchronous functions include counters, multiple independent chip and byte enables, and synchronous interrupts.

Packaging for the device is a 256-contact BGA. The core memory array operates from a 2.5-V supply, while the I/O lines are user-configurable for 2.5- or 3.3-V operation. A sleep mode minimizes power consumption. Furthermore, a Joint Test Action Group (JTAG) interface improves manufacturability with enhanced board debug and production diagnostics.

With the 72T36135M FIFO's "mark and re-transmit" feature, users can set a read marker on the queue. Data also can be re-read once from the queue or multiple times if data re-transmission is necessary. Another value-added function is user-selectable I/O that supports 1.8-V HTSL, 2.5-V HSTL, or 2.5-V LVTTL configurations on each port to simplify the interfacing of devices operating at different voltage levels. There's also frequency matching and programmable empty, partially empty, full, and partially full flagging. The FIFO comes in a space-saving 240-contact PBGA package.

Sampling now, the 36-Mbit dual-port chip costs $165 each in 10,000-unit quantities. The 18-Mbit TeraSync FIFO, which costs $150 in similar lots, will begin sampling in January.

Integrated Device Technology Inc.

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