Electronic Design

Switched-Fabric Interconnect Architecture Strives To Meet Increased Bandwidth Demands

A new switched-fabric interconnect architecture called RapidIO promises to meet the networking industry's need for higher reliability, greater bandwidth, and faster bus speeds. Announced at the Embedded Systems Conference Spring 2000, RapidIO is a result of a collaborative design effort between Motorola of Austin, Texas, and Mercury Computer Systems of Chelmsford, Mass.

RapidIO targets chip-to-chip and board-to-board communications. Most other interconnect standards are optimized for system-to-system communications. But such optimization slows performance and increases cost when applied to intrasystem applications.

The specification defines a high-performance interconnect architecture for passing data and control information among various devices (see the figure). These include microprocessors, DSPs, communications and network processors, system memory, and peripherals within a system.

The initial RapidIO specification defines physical-layer technology suitable for chip-to-chip and board-to-board communications at throughputs exceeding 10 Gbits/s. Communications are across standard pc-board technology using low-voltage differential signaling.

This packet-switched interconnect architecture is conceptually similar to Internet protocol (IP). It's designed for use by the processor and peripheral interface, where high bandwidth and low latency are crucial. The architecture is partitioned into a 3-layer hierarchy of logical, transport, and physical specifications. RapidIO also is transparent to application software and doesn't require special device drivers. Additionally, it has no impact on operating-system software, according to its proponents.

Where does RapidIO stand in relation to standards such as InfiniBand, PCI, and PCI-X? InfiniBand is optimized for links between server chassis within an enterprise cluster. RapidIO interconnects will likely coexist inside InfiniBand subsystems. Both InfiniBand and RapidIO, however, address card-to-card communications. Designers will need to make a choice here.

As for PCI and PCI-X, RapidIO is expected to leverage PCI rather than replace it at first. Bridge chips can employ RapidIO technology inside PCI or PCI-X fabrics. RapidIO's proponents say that designers can now configure PCI-oriented systems containing hundreds of PCI or PCI-X slots. RapidIO aggregates PCI activity and then channels it to one or more processors.

Although the RapidIO architecture will be used in conjunction with other buses initially—PCI and PCI-X are the most prominent examples—future products, based entirely on native RapidIO interfaces, may emerge. Their creation will occur when and if the new technology's increased performance and lower latency warrants an extension from PCI-X.

Motorola and networking companies Cisco Systems Inc., Lucent Technologies, and Nortel Networks Corp. intend to establish the RapidIO Trade Association. This nonprofit organization will direct future development and promotion of the new interconnect as an open standard.

For more information on the RapidIO interconnect architecture and how to join the RapidIO Trade Association, visit www.RapidIO.org.

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