System Design Tool Pulls Together Multiple Simulation Technologies

June 1, 1999

Schematic entry, Spice simulation, VHDL design entry and simulation, FPGA/CPLD synthesis, RF capabilities, post-processing features and seamless transfer to pc-board layout are all contained within the Multisim system design tool. The package's scalable functionality combines with a variety of team-design features to make it useful both for individual designers and teams of engineers who can collaborate by designing with a common EDA tool.The tool is distinguished by its integration of Spice, VHDL and Verilog simulation engines in a single co-simulation environment. Co-simulation is the ability for multiple simulators to interact with each other in real time. It enables users to perform, for example, schematic capture of a circuit to be implemented on a pc board, while using "fully programmed" FPGAs or CPLDs as some of the components on their board-level circuit, and have Multisim transparently simulate the entire board as one simulation (FPGAs and CPLDs use VHDL or Verilog code as their models, instead of Spice). With Spice, VHDL and Verilog interacting in the background, users can see integrated simulation results, displaying the board's overall behavior with the programmable devices taken into account.Another implication of this functionality is that non-HDL-experienced designers can simulate with parts not easily modeled in Spice, but that are available as VHDL or Verilog models. Users can employ HDL parts in Multisim without having to understand the underlying VHDL or Verilog model. The tool is offered in Personal, Professional and Power Pro editions.

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