The 68K was king of the 32-bit microprocessor hill. As the first 32-bit microprocessor standard, many tried to emulate it. The 68K was a classic, an architecture for the ages.
Designers of the 68K did many things right. They combined a 32-bit datapath with a 16-bit instruction set architecture (ISA). The rest is history. Even today, the 68K is considered the benchmark for code compactness. It was an easy to use ISA, fairly orthogonal, with lots of registers to hold intermediate values and addresses.
As the 32-bit microprocessor standard, it served as a base for a wide range of hardware, software tools, and applications. It was a proprietary architecture from Motorola, primarily delivered as an IC, but was also deployed as a number of application-specific standard parts (ASSPs). It did, however, lack ASIC core support.
This combination worked. But the fundamental limit was the number of design teams that Motorola could field for ICs, ASSPs, and cores. Today, that limitation would be fatal. Needed is an open standard that supports a wide diversity of architectures and implementations to feed the current explosive expansion of applications. No architectural vendor can field enough design teams to do the job. Instead, they must enlist industry designers to expand the implementations.
Today, unlike the 68K, a 32-bit microprocessor standard must be deployable as an IC, as ASSPs, and as a core for ASICs. One 32-bitter does this—the MIPS architecture. It's deployed in all three forms, with increasing product diversity for 32/64-bit implementations. The architecture is licensed by MIPS Technology.
MIPS was one of the pioneering RISCs. It has a full 32-bit ISA and has always been one of the more efficiently laid-out RISC CPUs. It was the first to pioneer 64-bit datapaths for embedded dataflow applications, and it has also penetrated the SoC market.
Two competing architectures are ARM and PowerPC. Both have in-creasing diversity, but they have yet to let go of proprietary control over their architectures. The ARM architecture, licensed by ARM, has numerous IC, ASSP, and core implementations. These, however, use ARM CPUs from ARM itself (except for the Intel/DEC StrongARM).
ARM was designed for low-power RISC applications. Its CPUs feature low-power operation and a compact ISA. The architecture has a small register set, which has limited ARM's deployment for higher-level applications. But, ARM has built a solid base in handhelds, SoCs, portables, and low-power controllers.
Unlike MIPS or ARM, the PowerPC is a proprietary architecture. It was jointly developed by Apple, IBM, and Motorola. Both IBM and Motorola supply ICs and ASSPs, with IBM delivering ASIC cores, as well as supporting buses. They have built a broad PowerPC base for mid- to high-end applications. The resultant PowerPC is a solid ISA, ranging from low-end cores to a high-performance Vector Processor, the G4.
Interestingly, there's another dimension to diversifying a 32-bit standard, one beyond IC, ASSP, and core deployment. That is configuring or extending the architecture by adding new instructions, new functional processing, or memory hierarchy. This tactic adds to required implementation diversity too, but lets customers, rather than vendors, exercise their design choices at the SoC level.
Things change. The 68K had the right stuff for yesteryear. Today's design crucible demands more product diversity than the 68K model could supply. What RISC will take the 68K's place as the next 32-bit microprocessor standard?