Electronic Design

eFUSE Technology Uses Electrically Programmable PMOS Gate Oxide Anti-Fuses

The ASIC and Foundry Business Unit at Toshiba Electronics Europe (TEE) has announced that European ASIC and system-on-chip (SoC) customers can now take advantage of eFUSE (electrical programmable fuse) technology when developing ICs based on Toshiba processes. The eFUSE technology uses electrically programmable PMOS gate oxide anti-fuses to provide a flexible solution for performance tuning, memory repair, and the updating of configuration and version data. eFUSE can also be used for ‘chip ID’ memory and tracing functions, and key ROM storage for secure data transmission. Read operation requires only the core IC power supply, while the high programming voltage required for write operations is provided by an integrated program voltage generator from an external 2.5V or 3.3V supply.

Compatible with Toshiba’s latest CMOS technologies, eFUSE is supplied with customer-selected configurations as a fully integrated one-time-programmable (OTP) macro. Programming can be performed either by the customer (i.e. in the field) or by Toshiba during IC testing. Customers can specify memory content or provide algorithms for content generation. Toshiba is offering three types of eFUSE. Generic eFUSE-SR, available for 65nm, 90nm, and 130nm processes, offers serial access and a capacity of 64bit to 1kbit in 64bit increments. For 40nm and 65nm processes, eFUSE-MX features random access and capacities up to 8kbit. Finally, for 40nm technologies, eFUSE-SS is a small capacity, 16bit macro suited to trimming and ID functions.

TAGS: Toshiba
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