Low-power Cores Deliver Converged RISC/DSP Functionality

24KE processor cores can cut power consumption and component costs in consumer electronics applications.

A new plateau of high performance combined with low power—that’s the claim made by MIPS Technologies concerning its new 32bit, synthesisable processor cores with integrated DSP functionality. The company believes the 850MHz MIPS32 24KE processor core family will ultimately enable OEMs and semiconductor companies to cut SoC costs, die area, and power consumption.

With its converged RISC/DSP functionality, the 24KE core family provides a cost and powersensitive design solution. Traditionally, many SoCs use a RISC CPU for control functions and a separate DSP for signal processing. By integrating the MIPS DSP ASE (Application- Specific Extension), the 24KE core family eliminates the need for a separate DSP.

Therefore, in addition to lower silicon cost and lower power consumption, the 24KE cores facilitate a faster, less-costly development process. They also deliver up to three times the signal-processing performance of RISC processors without the DSP ASE.

Synthesizable processor

One of the unusual features of the 24KE core family is its versatility. It is fully static, fully synthesizable, and requires no custom cells or memories. It can be synthesized using best-of-class physical IP from multiple vendors. For example, by using high-speed memories from Dolphin Technology and highspeed standard cells in a 90nm GT process, the 24KE cores can achieve a clock frequency of 850MHz. At 1.46 DMIPS/MHz, this design provides 1240 DMIPS.

For those SoCs in which maximum speed is just one of the goals, the 24KE cores can be synthesized in a 90nm G process using high-density standard cells and memories (such as those from Virage Logic).

Using this IP, when optimised for power and area, a complete 24KE processor, including 16K I and D Level 1 caches, occupies 2.0mm2 and consumes only 0.43mW/MHz. Even lowerpower figures can be achieved by using more aggressive lowpower techniques such as multi-VT and voltage/frequency scaling.

“High-performance cores that achieve frequencies of 850 MHz and provide RISC/DSP convergence are the ideal choices for engineers trying to solve the challenges of die size and cost, since both control and media functions can be now be combined onto a single host,” says Jack Browne, vice president of marketing at MIPS Technologies.


The 24KE core family targets markets such as set-top boxes, DTVs, DVD recorders, voice switches, IP phones, digital cameras, cell phones, modems, residential gateways, and automotive telematics. Also, the low power consumption of these cores suits them for battery-powered and thermally constrained devices.

Applications enhanced by the MIPS32 DSP ASE include VoIP processing, narrowband and broadband communications, digital audio, graphics, video, and imaging.

Some speed achievements achieved by the DSP ASE include a 68% boost in iDCT (inverse discrete cosine transform) processing (used in video compression) and a 106% acceleration in iMDCT (modified discrete cosine transform) used in MP3 decoding. Complex DSP kernel functions, such as FIR filters, achieve up to a 234% performance boost, while a standard 32x32 DCT with saturation jumps 315%.

Meet the family

The 24KE core family includes the 24KEc, 24KEf, 24KEc Pro, and 24KEf Pro cores. The 24KEc Core is the base core for the 24KE family, which incorporates the MIPS32 instruction set, an MMU, a fast multiple/divide unit, and the MIPS DSP ASE.

The 24KEf Core has all of the 24KEc’s features and adds a high-performance hardware floating point unit.

The 24KE Pro Cores add the CorExtend feature, which allows SoC designers to add proprietary, user-defined instructions and tightly coupled hardware. These instructions integrate seamlessly with the processor’s normal execution pipeline.

24KE in IP-phone

One of the first products based on this core family is the INCAIP2 SoC developed for the VoIP market by Germany’s Infineon Technologies (see the figure). It contains two 24KE cores. The IPphone SoC uses an architecture based on two MIPS32 24KEc processors, each running at 400MHz. One CPU becomes a network processor, while the second core employs an RTOS paired with dedicated VoIP Hardware. This turns INCA-IP2 into a voice engine that can support many advanced voice applications. The design of INCA-IP2 also doubles the processing power compared to designs consisting of a CPU and a DSP.

With this scalability, system vendors can now improve time to market and turn IP phones into future-proof, multimedia devices, says Infineon.

With GbE (Gigabit Ethernet) network performance now a reality, the IP-phone has become a vital link in the network rather than its end point. INCA-IP2 provides designers with enough processing power and Gigabit Ethernet speeds to implement new voice and graphical features that address business users’ needs.

One INCA-IP2 processor core is used for packet handling and to run the operating system, while the second core runs applicationspecific DSP code to ensure jitterfree VoIP performance. Also, INCA-IP2’s data encryption and authentication features bring the IP-phone in line with the strict security requirements of today’s enterprise network.

“We are fully committed to develop best-in-class semiconductor solutions that enable our customers to exceed market requirements in wired communications,” says Christian Wolff, senior vice president of the Communication Solutions Business Group and general manager of the Wireline Access Business Unit at Infineon.

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