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Turbocoder IP Cores Use Up To 80% Less SRAM

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A family of turbocoder IP cores has been introduced for implementation in SoCs in high-speed, wireless communication applications. Turbo coding is used for FEC in a variety of wireless data communications systems, including 3G/UMTS and CDMA/CDMA 2000 mobile phones, digital video broadcasting systems, satellites, xDSL systems, wireless LANs and wireless PDAs, as well as high-speed fiber optic systems. The family includes a turbo encoder, a turbo decoder and a full duplex turbo codec that combines encoding and decoding. All three cores are available in synthesizable VHDL or Verilog, verified using Artisan ComponentsÕ TSMC 0.18-micron standard cell library. They come with cycle-accurate and bit-accurate ANSI C++ or SystemC models for high-speed SoC-level verification. The cores are also available in high-level C++, in combination with AdelanteÕs A|RT designer IP generation tools, enabling the user to generate customized versions for particular applications. All three turbocoder IP cores are available in VHDL or Verilog descriptions in the TSMC 0.18 and SRAM generator. Prices start at $70,000. For further information, contact Herman Beke at ADELANTE TECHNOLOGIES, Leuven, Belgium. +32 16 39 14 11.

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