Over the last year Summit Interconnect manufacturing experts have noticed unusual delamination events with HDI designs, especially with co-planar wave guides or co-planar high speed digital designs.
The designs that have failed contain many HDI vias with many combinations of drill spans, with wide areas of no copper relief in the plane layers or very little. This combination of high layer copper percentage retention and the processing of microvias, blind/buried or epoxy filled vias create a condition where processing moisture becomes trapped in the dielectric between plane layers.
If there is no copper relief in the layers vertically, then the only way to bake the moisture out is through the side of the PCB. This could include very long distances that may require upwards of 24-72 hours of baking to “move” the moisture out of the PCB.
In this QuickChat with Gerry Partida, Vice President of Technology at Summit Interconnect, learn about the reflow attributes of HDI and highly retained copper layers, how to eliminate moisture in printed circuit boards, and concerns with longer baking times.
For more information on this topic read Let Me Vent! - Summit Interconnect by Gerry Partida.
About Summit Interconnect
Summit Interconnect is the largest, privately held PCB manufacturer in North America. The company is focused on the fast-growing defense and high-performance commercial sectors in the North American market. Summit offers solutions ranging from advanced cutting-edge prototyping to complex high mix, low-to-mid volume production. Summit’s facilities are located across California, Illinois, Colorado, and Toronto, Canada. For more information, please visit: summitinterconnect.com.