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Microchip Delivers RISC-V Hard-Core FPGA SoCs

Dec. 10, 2019
Looking for RISC-V? Well you have come to the right place. Here we present more information on this open-source instruction that targets microprocessor and microcontroller applications. The latest entry covers Microchip's latest announcement regarding its PolarFire SoC.

Microchip’s PolarFire SoC that incorporated multiple, 64-bit hard RISC-V cores with its FPGA fabric was announced last year. The company’s announcement at this year’s RISC-V Summit includes delivery of actual parts, including development boards.

The PolarFire SoC (see figure) contains a cache-coherent interconnect paired with a deterministic L2 memory subsystem and a DDR4/LPDDR4 memory controllers. The SoCs also feature a 128-kB boot flash memory that supports secure booting.

The processing environment is designed to provide a deterministic programming environment as well as a focus on security and reliability. This includes tamperproof support plus differential-power-analysis (DPA) countermeasures to prevent cloning. Memory supports single error correction, dual error detection (SECDED) and its flash-based storage helps significantly reduce power requirements for the FPGA fabric. Errors can be routed to the FPGA fabric to allow for customizable hardware response. The fabric’s flash memory also provides instant-on operation, which is also single-error-upset (SEU) neutron immune.

The use of RISC-V for the processor architecture enables Linux and other operating systems to run in a real-time, deterministic fashion on the coherent CPU cluster. The core designs were developed in conjunction with SiFive and UltraSoC. The CPU designs are immune to Spectre- and Meltdown-style attacks and the built-in crypto processor is also immune to side-channel attacks.

The PolarFire SoC is supported by Microchip’s Mi-V ecosystem, which includes development tools like IDEs from IAR Systems and AdaCore. A range of operating systems support the hardware, including those from Micrium, Siemens/Mentor, Wind River and Microsoft/Express Logic, Amazon/FreeRTOS, Yocto/Linux, and Zephyr. On top of that, the FPGA SoC family is backed by Microchip’s Libero designer and SoftConsole IDE with GCC compiler support.

The PolarFire SoC Icicle development kit includes a MPFS250T-1FCVG484 chip with 254K logic elements. It’s priced under $300; the board and chips in quantity will be available in the third quarter. Developer can use the soft-core Microchip FPGA board to get started working with RISC-V now.

PolarFire SoCs come in packages as small as 11 × 11 mm and in configurations with up to 20 12.5- Gb/s SERDES. They feature dual-channel PCI Express Gen 2 support and up to 461K logic elements. Industrial- and military-grade components are available.

The PolarFire SoC is significant to the RISC-V community because it’s a commercially available platform designed for deployment. Many other RISC-V solutions have targeted dedicated applications rather than general platforms such as this one. Microchip’s earlier soft-core RISC-V FPGA solutions are still available, but this hard-core solution offers significantly better performance and efficiency. Thanks to the FPGA fabric, much more advanced single-chip solutions are possible compared to an SoC-only alternative.

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